Datasheet

ADuC814
Rev. A | Page 58 of 72
IP Interrupt Priority Register
SFR Address B8H
Power-On Default 00H
Bit Addressable Yes
--- PADC PT2 PS PT1 PX1 PT0 PX0
Table 30. IP SFR Bit Designations
Bit No. Name Description
7 --- Reserved.
6 PADC ADC Interrupt Priority.
Written to by user to set interrupt priority level (1 = High; 0 = Low).
5 PT2 Timer 2 Interrupt Priority.
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
4 PS UART Serial Port Interrupt Priority.
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
3 PT1 Timer 1 Interrupt Priority.
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
2 PX1 External Interrupt 1 Priority (INT1).
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
1 PT0 Timer 0 Interrupt Priority.
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
0 PX0 External Interrupt 0 Priority (INT0).
Written to by the user to set interrupt priority level (1 = High; 0 = Low).
IEIP2 Secondary Interrupt Enable and Priority Register
SFR Address A9H
Power-On Default A0H
Bit Addressable No
--- PT1 PPSM PSI --- ETI EPSM ESI
Table 31. IEIP2 SFR Bit Designations
Bit No. Name Description
7 --- Reserved.
6 PTI Time Interval Counter Interrupt Priority.
Written to by the user to set TIC interrupt priority (1 = High; 0 = Low).
5 PPSM PSM Interrupt Priority.
Written to by the user to select power supply monitor interrupt priority (1 = High; 0 = Low).
4 PSI SPI Serial Port Interrupt Priority.
Written to by the user to select SPI serial port interrupt priority (1 = High; 0 = Low).
3 --- Reserved. This bit must be 0.
2 ETI TIC Interrupt.
Set by the user to enable the TIC interrupt.
Cleared by the user to disable the TIC interrupt.
1 EPSM Power Supply Monitor Interrupt.
Set by the user to enable the power supply monitor interrupt.
Cleared by the user to disable the power supply monitor interrupt.
0 ESI SPI Serial Port Interrupt.
Set by the user to enable the SPI serial port interrupt.
Cleared by the user to disable the SPI serial port interrupt.