Datasheet
ADuC814
Rev. A | Page 57 of 72
INTERRUPT SYSTEM
The ADuC814 provides a total of twelve interrupt sources with two priority levels. The control and configuration of the interrupt system
is carried out through three interrupt-related SFRs.
IE Interrupt Enable Register
IP Interrupt Priority Register
IEIP2 Secondary Interrupt Enable and Priority Register
IE Interrupt Enable Register
SFR Address A8H
Power-On Default 00H
Bit Addressable Yes
EA EADC ET2 ES ET1 EX1 ET0 EX0
Table 29. IE SFR Bit Designations
Bit No. Name Description
7 EA Global Interrupt Enable.
Set by the user to enable all interrupt sources.
Cleared by the user to disable all interrupt sources.
6 EADC ADC Interrupt.
Set by the user to enable the ADC interrupt.
Cleared by the user to disable the ADC interrupt.
5 ET2 Timer 2 Interrupt.
Set by the user to enable the Timer 2 interrupt.
Cleared by the user to disable the Timer 2 interrupt.
4 ES UART Serial Port Interrupt.
Set by the user to enable the UART serial port interrupt.
Cleared by the user to disable the UART serial port interrupt.
3 ET1 Timer 1 Interrupt.
Set by the user to enable the Timer 1 interrupt.
Cleared by the user to disable the Timer 1 interrupt.
2 EX1 INT1 Interrupt.
Set by the user to enable the External Interrupt 1.
Cleared by the user to disable the External Interrupt 1.
1 ET0 Timer 0 Interrupt.
Set by the user to enable the Timer 0 interrupt.
Cleared by the user to disable the Timer 0 interrupt.
0 EX0 INT0 Interrupt.
Set by the user to enable the External Interrupt 0.
Cleared by the user to disable the External Interrupt 0.