Datasheet

ADuC814
Rev. A | Page 52 of 72
TIMER/COUNTER 2 OPERATING MODES
This section describes the operating modes for Timer/Counter
2. The operating modes are selected by bits in the T2CON SFR
as shown in Table 27.
Table 25. Mode Selection in T2CON
RCLK (or) TCLK CAP2 TR2 MODE
0 0 1 16-Bit Autoreload
0 1 1 16-Bit Capture
1 X 1 Baud Rate
X X 0 OFF
16-Bit Autoreload Mode
In autoreload mode, there are two options that are selected by
bit EXEN2 in T2CON. If EXEN2 = 0, then when Timer 2 rolls
over, it not only sets TF2 but also causes the Timer 2 registers to
be reloaded with the 16-bit value in registers RCAP2L and
RCAP2H, which are preset by software. If EXEN2 = 1, then
Timer 2 still performs the above, but with the added feature that
a 1-to-0 transition at external input T2EX also triggers the
16-bit reload and sets EXF2. The autoreload mode is illustrated
in Figure 49.
16-Bit Capture Mode
In the capture mode, there are again two options that are
selected by bit EXEN2 in T2CON. If EXEN2 = 0, then Timer 2
is a 16-bit timer or counter which, upon overflowing, sets bit
TF2, the Timer 2 overflow bit, which can be used to generate an
interrupt. If EXEN2 = 1, then Timer 2 still performs the above,
but a 1-to-0 transition on external input T2EX causes the cur-
rent value in the Timer 2 registers, TL2 and TH2, to be captured
into registers RCAP2L and RCAP2H, respectively. In addition,
the transition at T2EX causes bit EXF2 in T2CON to be set, and
EXF2, like TF2, can generate an interrupt. Capture mode is
illustrated in Figure 50.
The baud rate generator mode is selected by RCLK = 1 and/or
TCLK = 1. In either case, if Timer 2 is being used to generate
the baud rate, the TF2 interrupt flag does not occur. Therefore
Timer 2 interrupts do not occur so they do not have to be
disabled. In this mode, the EXF2 flag, however, can still cause
interrupts; this can be used as a third external interrupt. Baud
rate generation is described as part of the UART Serial Interface
section that follows.
TF2
CORE
CLK*
÷12
TR2
CONTROL
TL2
(8 BITS)
TL2
(8 BITS)
CAPTURE
EXF2
TIMER
INTERRUPT
EXEN2
CONTROL
TRANSITION
DETECTOR
T2EX
PIN
T2
PIN
RCAP2L RCAP2H
C/T2 = 1
C/T2 = 0
*THE CORE CLOCK IS THE OUTPUT OF THE PLL
02748-A-055
Figure 49. Timer/Counter 2, 16-Bit Autoreload Mode
TF2
CORE
CLK*
÷12
TR2
CONTROL
TL2
(8 BITS)
TL2
(8 BITS)
CAPTURE
EXF2
TIMER
INTERRUPT
EXEN2
CONTROL
TRANSITION
DETECTOR
T2EX
PIN
T2
PIN
RCAP2L RCAP2H
C/T2 = 1
C/T2 = 0
*THE CORE CLOCK IS THE OUTPUT OF THE PLL
02748-A-056
Figure 50. Timer/Counter 2, 16-Bit Capture Mode