Datasheet
ADuC814
Rev. A | Page 56 of 72
Timer 2 Generated Baud Rates
Baud rates can also be generated using Timer 2. Using Timer 2
is similar to using Timer 1 in that the timer must overflow 16
times before a bit is transmitted/received. Because Timer 2 has a
16-bit autoreload mode, a wide range of baud rates is possible
using Timer 2.
Modes 1 and 3 Baud Rate = (1/16) × (Timer 2 Overflow Rate)
Therefore, when Timer 2 is used to generate baud rates, the
timer increments every two clock cycles and not every core
machine cycle as before. Therefore, it increments six times faster
than Timer 1, and therefore baud rates six times faster are
possible. Because Timer 2 has 16-bit autoreload capability, very
low baud rates are still possible. Timer 2 is selected as the baud
rate generator by setting the CLK and/or RCLK in T2CON. The
baud rates for transmit and receive can be simultaneously
different. Setting RCLK and/or TCLK puts Timer 2 into its baud
rate generator mode as shown in Figure 53.
In this case, the baud rate is given by the formula
Modes 1 and 3 Baud Rate = (Core Clk)/
(32 × [65536 – (RCAP2H, RCAP2L)])
Table 28 shows some commonly used baud rates and how they
could be calculated from a core clock frequency of 2.0971 MHz
and 16.7772 MHz.
Table 28. Commonly Used Baud Rates, Timer 2
Ideal
Baud
Core
CLK
RCAP2H
Value
RCAP2L
Value
Actual
Baud
%
Error
19200 16.78 –1 (FFH) –27 (E5H) 19418 1.14
9600 16.78 –1 (FFH) –55 (C9H) 9532 0.7
2400 16.78 –1 (FFH) –218 (26H) 2405 0.21
1200 16.78 –2 (FEH) –181 (4BH) 1199 0.02
9600 2.10 –1 (FFH) –7 (FBH) 9362 2.4
2400 2.10 –1 (FFH) –27 (ECH) 2427 1.14
1200 2.10 –1 (FFH) –55 (D7H) 1191 0.7
CORE
CLK*
÷2
÷2
÷16
÷16
TR2
CONTROL
RELOAD
TL2
(8 BITS)
TL2
(8 BITS)
EXEN2
CONTROL
NOTE: AVAILABILITY OF ADDITIONAL
EXTERNAL INTERRUPT
NOTE: OSCILLATOR FREQUENCY IS DIVIDED BY 2, NOT 12
TRANSITION
DETECTOR
T2EX
PIN
T2
PIN
RCAP2L RCAP2H
C/T2 = 1
C/T2 = 0
*THE CORE CLOCK IS THE OUTPUT OF THE PLL
02748-A-059
RCLK
TCLK
RX
CLOCK
TX
CLOCK
0
0
1
1
10
SMOD
TIMER 2
OVERFLOW
TIMER 1
OVERFLOW
EXF 2
TIMER 2
INTERRUPT
Figure 53. Timer 2, UART Baud Rates