Datasheet

ADuC814
Rev. A | Page 36 of 72
SOURCE/SINK CURRENT (mA)
5
0 5 10 15
OUTPUT VOLTAGE (V)
4
3
2
1
0
DAC LOADED WITH 0000H
DAC LOADED WITH 0FFFH
02748-A-046
Figure 40. Source and Sink Current Capability with V
REF
= V
DD
= 5 V
SOURCE/SINK CURRENT (mA)
4
0 5 10 15
OUTPUT VOLTAGE (V)
3
1
0
DAC LOADED WITH 0000H
DAC LOADED WITH 0FFFH
02748-A-046
Figure 41. Source and Sink Current Capability with V
REF
= V
DD
= 3 V
For larger loads, the current drive capability may not be sufficient.
To increase the source and sink current capability of the DACs,
an external buffer should be added, as shown in Figure 42.
ADuC814
DAC0
DAC1
02748-A-048
Figure 42. Buffering the DAC Outputs
The DAC output buffer also features a high impedance disable
function. In the chip’s default power-on state, both DACs are
disabled, and their outputs are in a high impedance state (or
three-state) where they remain inactive until enabled in
software. This means that if a zero output is desired during
power-up or power-down transient conditions, then a pull-
down resistor must be added to each DAC output. Assuming
this resistor is in place, the DAC outputs remain at ground
potential whenever the DAC is disabled.