Datasheet

ManualsBrandsANALOG DEVICES ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 80 (12x12) 16/32-Bit 41.78 MHz I/O number 38

ADuC7128/ADuC7129

Rev. 0 | Page 87 of 92

HARDWARE DESIGN CONSIDERATIONS

POWER SUPPLIES

The ADuC7128/ADuC7129 operational power supply voltage

range is 3.0 V to 3.6 V. Separate analog and digital power supply

pins (AV

and IOV

, respectively) allow AV

to be kept

relatively free of noisy digital signals often present on the system

IOV

line. In this mode, the part can also operate with split

supplies, that is, using different voltage supply levels for each

supply. For example, the system can be designed to operate with

an IOV

voltage level of 3.3 V while the AV

level can be at

3 V, or vice versa, if required. A typical split supply configuration

is shown in

Figure 66.

ANALOG SUPPLY

DIGITAL SUPPLY

GND

REF

DACGND

AGND

REFGND

IOV

DACV

IOGND

ADuC7128

10µF10µF

0.1µF

0.47µF

0.1µF

6020-056

Figure 66. External Dual Supply Connections

As an alternative to providing two separate power supplies, the

user can help keep AV

quiet by placing a small series resistor

and/or ferrite bead between AV

and IOV

, and then decoupling

separately to ground. An example of this configuration is

shown in

Figure 67. With this configuration, other analog circuitry

(such as op amps or voltage references) can be powered from

the AV

supply line as well.

DIGITAL SUPPLY

GND

REF

DACGND

AGND

REFGND

IOV

DACV

IOGND

ADuC7128

10µF

0.1µF

0.47µF

0.1µF

BEAD

1.6V

06020-057

Figure 67. External Single Supply Connections

Note that in both Figure 66 and Figure 67, a large value (10 µF)

reservoir capacitor sits on IOV

and a separate 10 µF capacitor

sits on AV

. In addition, local small value (0.1 µF) capacitors

are located at each AV

and IOV

pin of the chip. As per

standard design practice, be sure to include all of these capaci-

tors and ensure that the smaller capacitors are close to each

pin with trace lengths as short as possible.

Connect the ground terminal of each of these capacitors directly

to the underlying ground plane. It should also be noted that, at

all times, the analog and digital ground pins on the ADuC7128/

ADuC7129 must be referenced to the same system ground refer-

ence point.

Finally, on the LFCSP package, the paddle on the bottom of the

package should be soldered to a metal plate to provide mechanical

stability. The metal plate should be connected to ground.

Linear Voltage Regulator

The ADuC7128/ADuC7129 require a single 3.3 V supply, but

the core logic requires a 2.5 V supply. An on-chip linear regulator

generates the 2.5 V from IOV

for the core logic. The LV

is the 2.5 V supply for the core logic. The DAC logic and PLL logic

also require a 2.5 V supply that must be connected externally from

the LV

pin to the DACV

pin and the PV

pin. An external

compensation capacitor of 0.47 μF must be connected between

and DGND (as close as possible to these pins) to act as a

tank of charge, as shown in

Figure 68. In addition, decoupling

capacitors of 0.1 μF must be placed as close as possible to the

pin and the DACV

pin.

DACV

ADuC7128

0.1µF

0.47µF

06020-058

Figure 68. Voltage Regulator Connections

The LV

pin should not be used for any other chip. It is also

recommended that the IOV

have excellent power supply

decoupling to help improve line regulation performance of the

on-chip voltage regulator.

GROUNDING AND BOARD LAYOUT

RECOMMENDATIONS

As with all high resolution data converters, special attention

must be paid to grounding and PC board layout of the design to

achieve optimum performance from the ADCs and DAC.

Although the ADuC7128/ADuC7129 have separate pins for

analog and digital ground (AGND and IOGND), the user must

not tie these to two separate ground planes unless the two ground

planes are connected together very close to the ADuC7128/

ADuC7129, as illustrated in the simplified example of

Figure 69a.

In systems where digital and analog ground planes are connected

together somewhere else (for example, at the system power

supply), they cannot be connected again near the ADuC7128/

ADuC7129 because a ground loop results.