Datasheet

ADuC7128/ADuC7129
Rev. 0 | Page 86 of 92
0
6020-072
DATAADDRESS
1 WRITE STROBE WAIT STATE
(BIT 7 TO BIT 4)
1 ADDRESS WAIT STATE
(BIT 14 TO BIT 12)
HCLK
A
D16:0
MSx
AE
WS
Figure 65. External Memory Write Cycle with Wait States