Datasheet

ADuC7128/ADuC7129
Rev. 0 | Page 60 of 92
Table 82. COMxIEN0 MMR Bit Designations
Bit Name Description
7:4 RSVD Reserved.
3 EDSSI Modem Status Interrupt Enable Bit.
Set by user to enable generation of an interrupt if any of COMxSTA1[3:0] are set.
Cleared by user.
2 ELSI RX Status Interrupt Enable Bit.
Set by user to enable generation of an interrupt if any of COMxSTA0[3:1] are set.
Cleared by user.
1 ETBEI Enable Transmit Buffer Empty Interrupt.
Set by user to enable interrupt when buffer is empty during a transmission.
Cleared by user.
0 ERBFI Enable Receive Buffer Full Interrupt.
Set by user to enable interrupt when buffer is full during a reception.
Cleared by user.
Table 83. COMxIID0 MMR Bit Designations
Bit 2:1
Status Bits
Bit 0
NINT
Priority Definition Clearing Operation
00 1 No Interrupt.
11 0 1 Receive Line Status Interrupt. Read COMxSTA0.
10 0 2 Receive Buffer Full Interrupt. Read COMxRX.
01 0 3 Transmit Buffer Empty Interrupt. Write data to COMxTX or read COMxIID0.
00 0 4 Modem Status Interrupt. Read COMxSTA1.
Table 84. COMxCON1 MMR Bit Designations
Bit Name Description
7:5 RSVD Reserved.
4 LOOPBACK Loop Back.
Set by user to enable loop-back mode. In loop-back mode, the SOUT is forced high. In addition, the modem
signals are directly connected to the status inputs (RTS to CTS, DTR to DSR, OUT1 to RI, and OUT2 to DCD).
3 Reserved.
2 Reserved.
1 RTS Request to Send.
Set by user to force the RTS output to 0.
Cleared by user to force the RTS output to 1.
0 DTR Data Terminal Ready.
Set by user to force the DTR output to 0.
Cleared by user to force the DTR output to 1.