Datasheet

ADuC7128/ADuC7129
Rev. 0 | Page 30 of 92
Table 25. PLA Base Address = 0xFFFF0B00
Address Name Byte Access Type Cycle
0x0B00 PLAELM0 2 R/W 2
0x0B04 PLAELM1 2 R/W 2
0x0B08 PLAELM2 2 R/W 2
0x0B0C PLAELM3 2 R/W 2
0x0B10 PLAELM4 2 R/W 2
0x0B14 PLAELM5 2 R/W 2
0x0B18 PLAELM6 2 R/W 2
0x0B1C PLAELM7 2 R/W 2
0x0B20 PLAELM8 2 R/W 2
0x0B24 PLAELM9 2 R/W 2
0x0B28 PLAELM10 2 R/W 2
0x0B2C PLAELM11 2 R/W 2
0x0B30 PLAELM12 2 R/W 2
0x0B34 PLAELM13 2 R/W 2
0x0B38 PLAELM14 2 R/W 2
0x0B3C PLAELM15 2 R/W 2
0x0B40 PLACLK 1 R/W 2
0x0B44 PLAIRQ 4 R/W 2
0x0B48 PLAADC 4 R/W 2
0x0B4C PLADIN 4 R/W 2
0x0B50 PLAOUT 4 R 2
Table 26. External Memory Base Address = 0xFFFF0C00
Address Name Byte Access Type Cycle
0x0C00 XMCFG 1 R/W 2
0x0C10 XM0CON 1 R/W 2
0x0C14 XM1CON 1 R/W 2
0x0C18 XM2CON 1 R/W 2
0x0C1C XM3CON 1 R/W 2
0x0C20 XM0PAR 2 R/W 2
0x0C24 XM1PAR 2 R/W 2
0x0C28 XM2PAR 2 R/W 2
0x0C2C XM3PAR 2 R/W 2
Table 27. GPIO Base Address = 0xFFFF0D00
Address Name Byte Access Type Cycle
0x0D00 GP0CON 4 R/W 1
0x0D04 GP1CON 4 R/W 1
0x0D08 GP2CON 4 R/W 1
0x0D0C GP3CON 4 R/W 1
0x0D10 GP4CON 4 R/W 1
0x0D20 GP0DAT 4 R/W 1
0x0D24 GP0SET 1 W 1
0x0D28 GP0CLR 1 W 1
0x0D2C GP0PAR 4 R/W 1
0x0D30 GP1DAT 4 R/W 1
0x0D34 GP1SET 1 W 1
0x0D38 GP1CLR 1 W 1
0x0D3C GP1PAR 4 R/W 1
0x0D40 GP2DAT 4 R/W 1
0x0D44 GP2SET 1 W 1
0x0D48 GP2CLR 1 W 1
0x0D50 GP3DAT 4 R/W 1
0x0D54 GP3SET 1 W 1
0x0D58 GP3CLR 1 W 1
0x0D5C GP3PAR 4 R/W 1
0x0D60 GP4DAT 4 R/W 1
0x0D64 GP4SET 1 W 1
0x0D68 GP4CLR 1 W 1
0x0D6C GP4PAR 1 W 1
Table 28. Flash/EE Block 0 Base Address = 0xFFFF0E00
Address Name Byte Access Type Cycle
0x0E00 FEE0STA 1 R 1
0x0E04 FEE0MOD 1 R/W 1
0x0E08 FEE0CON 1 R/W 1
0x0E0C FEE0DAT 2 R/W 1
0x0E10 FEE0ADR 2 R/W 1
0x0E18 FEE0SGN 3 R 1
0x0E1C FEE0PRO 4 R/W 1
0x0E20 FEE0HID 4 R/W 1
Table 29. Flash/EE Block 1 Base Address = 0xFFFF0E80
Address Name Byte Access Type Cycle
0x0E80 FEE1STA 1 R 1
0x0E84 FEE1MOD 1 R/W 1
0x0E88 FEE1CON 1 R/W 1
0x0E8C FEE1DAT 2 R/W 1
0x0E90 FEE1ADR 2 R/W 1
0x0E98 FEE1SGN 3 R 1
0x0E9C FEE1PRO 4 R/W 1
0x0EA0 FEE1HID 4 R/W 1