Datasheet

ADuC7128/ADuC7129
Rev. 0 | Page 18 of 92
0
6020-064
2
ADC5
3
ADC6
4
ADC7
7
ADC10
6
ADC9
5
VDAC
OUT
/ADC8
1
ADC4
8
GND
REF
9
ADCNEG
10
AV
DD
12
ADC13/LD2TX
13
AGND
14
TMS
15
TDI/P0.1/BLE
16
P2.3/AE
17
P4.6/SPM10/AD14
18
P4.7/SPM11/AD15
19
P0.0/BM/CMP
OUT
/MS0
20
P0.6/T1/MRST
11
ADC12/LD1TX
59
58
57
54
55
56
60
53
52
P1.3/SPM3
P1.4/SPM4
P1.5/SPM5
IOV
DD
P4.0/S1/AD8
P4.1/S2/AD9
P1.2/SPM2
IOGND
P1.6/SPM6
51
P1.7/SPM7
49
P2.1/WS
48
P2.7/MS3
47
P3.7/AD7
46
P3.6/AD6
45
DGND
44
PV
DD
43
XCLKI
42
XCLKO
41
P0.7/SPM8/ECLK/XCL
K
50
P2.2/RS
21
TCK
22
TDO/P0.2/BHE
23
IOGND
24
IOV
DD
25
LV
DD
26
DGND
27
P3.0/PWM1/AD0
28
P3.1/PWM2/AD1
29
P3.2/PWM3/AD2
30
P3.3/PWM4/AD3
31
P2.4/MS0
32
P0.3/AD
C
BUSY
/TRST/A16
33
P2.5/MS1
34
P2.6/MS2
35
RST
36
P3.4/PWM5/AD4
37
P3.5/PWM6/AD5
38
P0.4/IRQ0/CONVST/MS1
39
P0.5/IRQ1/ADC
BUSY
40
P2.0/SPM9
80
ADC3/CMP1
79
ADC2/CMP0
78
ADC1
77
ADC0
76
ADC11
75
DACV
DD
74
AV
DD
73
AV
DD
72
AGND
71
AGND
70
DACGND
69
V
REF
68
REFGND
67
IOGND
66
P4.5/AD13
65
P4.4/AD12
64
P4.3/PWM
TRIP
/AD11
63
P4.2/AD10
62
P1.0/SPM0
61
P1.1/SPM1
PIN 1
ADuC7129
TOP VIEW
(Not to Scale)
Figure 11. ADuC7129 Pin Configuration
Table 11. ADuC7129 Pin Function Descriptions
Pin
No. Mnemonic Type
1
Description
1 ADC4 I Single-Ended or Differential Analog Input 4.
2 ADC5 I Single-Ended or Differential Analog Input 5.
3 ADC6 I Single-Ended or Differential Analog Input 6.
4 ADC7 I Single-Ended or Differential Analog Input 7.
5 VDAC
OUT
/ADC8 I Output from DAC Buffer/Single-Ended or Differential Analog Input 8.
6 ADC9 I Single-Ended or Differential Analog Input 9.
7 ADC10 I Single-Ended or Differential Analog Input 10.
8 GND
REF
S
Ground Voltage Reference for the ADC. For optimal performance, the analog power supply
should be separated from IOGND and DGND.
9 ADCNEG I
Bias Point or Negative Analog Input of the ADC in Pseudo Differential Mode. Must be
connected to the ground of the signal to convert. This bias point must be between
0 V and 1 V.
10, 73, 74 AV
DD
S 3.3 V Analog Supply.
11 ADC12/LD1TX I/O Single-Ended or Differential Analog Input 12/DAC Differential Negative Output.
12 ADC13/LD2TX I/O Single-Ended or Differential Analog Input 13/DAC Differential Positive Output.
13 AGND S Analog Ground. Ground reference point for the analog circuitry.
14 TMS I JTAG Test Port Input, Test Mode Select. Debug and download access.
15
TDI/P0.1/BLE
I/0
JTAG Test Port Input, Test Data In. Debug and download access/general-purpose input and
output Port 0.1/External Memory BLE
.
16 P2.3/AE I/O General-Purpose Input and Output Port 2.3/AE Output.