Datasheet

Data Sheet ADuC7124/ADuC7126
Rev. C | Page 73 of 108
I
2
C Master Receive Register
Name: I2C0MRX, I2C1MRX
Address: 0xFFFF0808, 0xFFFF0908
Default Value: 0x00
Access: Read only
Function: This 8-bit MMR is the I
2
C master receive
register.
I
2
C Master Transmit Register
Name: I2C0MTX, I2C1MTX
Address: 0xFFFF080C 0xFFFF090C
Default Value: 0x00, 0x00
Access: Read/write
Function: This 8-bit MMR is the I
2
C master transmit
register.
I
2
C Master Read Count Register
Name: I2C0MCNT0, I2C1MCNT0
Address: 0xFFFF0810, 0xFFFF0910
Default Value: 0x0000, 0x0000
Access: Read/write
Function: This 16-bit MMR holds the required number
of bytes when the master begins a read
sequence from a slave device.
Table 104. I2CxMCNT0 MMR Bit Descriptions
Bit Name Description
[15:9] Reserved.
8 I2CRECNT
Set this bit if more than 256 bytes are
required from the slave.
Clear this bit when reading 256 bytes or
less.
[7:0] I2CRCNT
These eight bits hold the number of bytes
required during a slave read sequence,
minus 1. If only a single byte is required,
these bits should be set to 0.
I
2
C Master Current Read Count Register
Name: I2C0MCNT1, I2C1MCNT1
Address: 0xFFFF0814, 0xFFFF0914
Default Value: 0x00, 0x00
Access: Read only
Function: This 8-bit MMR holds the number of bytes
received so far during a read sequence with a
slave device.
I
2
C Address 0 Register
Name: I2C0ADR0, I2C1ADR0
Address: 0xFFFF0818, 0xFFFF0918
Default Value: 0x00
Access: Read/write
Function: This 8-bit MMR holds the 7-bit slave address +
the read/write bit when the master begins
communicating with a slave.
Table 105. I2CxADR0 MMR in 7-Bit Address Mode
Bit Name Description
[7:1] I2CADR
These bits contain the 7-bit address of the
required slave device.
0 R/W Bit 0 is the read/write bit.
When this bit = 1, a read sequence is
requested.
When this bit = 0, a write sequence is
requested.
Table 106. I2CxADR0 MMR in 10-Bit Address Mode
Bit Name Description
[7:3]
These bits must be set to [11110b] in 10-bit
address mode.
[2:1] I2CMADR
These bits contain ADDR[9:8] in 10-bit
addressing mode.
0 R/W Read/write bit.
When this bit = 1, a read sequence is
requested.
When this bit = 0, a write sequence is
requested.