Datasheet

ADuC7124/ADuC7126 Data Sheet
Rev. C | Page 56 of 108
MMRs and Keys
The operating mode, clocking mode, and programmable clock
divider are controlled via three MMRs, PLLCON (see Table 7 3),
and POWCONx. PLLCON controls the operating mode of the
clock system, POWCON0 controls the core clock frequency and
the power-down mode, and POWCON1 controls the clock
frequency to I
2
C and SPI.
Table 72. PLLKEYx Registers
Name Address Default Value Access
PLLKEY1 0xFFFF0410 0x0000 W
PLLKEY2 0xFFFF0418 0x0000 W
PLLCON Register
Name: PLLCON
Address: 0xFFFF0414
Default Value: 0x21
Access: Read/write
Table 73. PLLCON MMR Bit Descriptions
Bit Value Name Description
[7:6] Reserved.
5 OSEL 32 kHz PLL input selection.
Set by the user to select the internal
32 kHz oscillator. Set by default.
Cleared by the user to select the
external 32 kHz crystal.
[4:2] Reserved.
[1:0] MDCLK Clocking modes.
00 Reserved.
01 PLL. Default configuration.
10 Reserved.
11 External clock on the P0.7 Pin.
To prevent accidental programming, a certain sequence must be
followed to write to the PLLCON register.The PLLCON write
sequence is as follows:
1. Write Code 0xAA to Register PLLKEY1.
2. Write user value to Register PLLCON.
3. Write Code 0x55 to Register PLLKEY2.
Table 74. POWKEYx Registers
Name Address Default Value Access
POWKEY1 0xFFFF0404 0x0000 W
POWKEY2 0xFFFF040C 0x0000 W
POWKEY1 and POWKEY2 are used to prevent accidental
programming to POWCON0.
POWCON0 Register
Name: POWCON0
Address: 0xFFFF0408
Default Value: 0x0003
Access: Read/write
Table 75. POWCON0 MMR Bit Descriptions
Bit Value Name Description
7 Reserved.
[6:4] PC Operating modes.
000 Active mode.
001 Pause mode.
010 Nap mode.
011
Sleep mode. IRQ0 to IRQ3 and Timer2
can wake up the part.
100
Stop mode. IRQ0 to IRQ3 can wake
up the part.
Others Reserved.
3 Reserved.
[2:0] CD CPU clock divider bits.
000 41.78 MHz.
001 20.89 MHz.
010 10.44 MHz.
011 5.22 MHz.
100 2.61 MHz.
101 1.31 MHz.
110 653 kHz.
111 326 kHz.
To prevent accidental programming, a certain sequence must be
followed to write to the POWCONx register. The POWCON0
write sequence is as follows:
1. Write Code 0x01 to Register POWKEY1.
2. Write a user value to Register POWCON0.
3. Write Code 0xF4 to Register POWKEY2.
Table 76. POWKEYx Registers
Name Address Default Value Access
POWKEY3 0xFFFF0434 0x0000 W
POWKEY4 0xFFFF043C 0x0000 W
POWKEY3 and POWKEY4 are used to prevent accidental
programming to POWCON1.
POWCON1 Register
Name: POWCON1
Address: 0xFFFF0438
Default Value: 0x124
Access: Read/write