Datasheet
ADuC7124/ADuC7126 Data Sheet
Rev. C | Page 18 of 108
2
ADC5
3
ADC6
4
ADC7
7
ADC10
6
ADC9
5
ADC8
1
ADC4
8
ADCNEG
9
DACGND
10
DACV
DD
12
DAC1/ADC13
13
DAC2/ADC14
14
DAC3/ADC15
15
TMS
16
TDI
17
P0.1/PWM4/BLE
18
XCLKO
19
XCLKI
20
BM/P0.0/CMP
OUT
/PLAI[7]/MS0
11
DAC0/ADC12
59
58
57
54
55
56
60
53
52
P1.4/SPM4/RI/SPICLK/PLAI[4]/IRQ2
P1.5/SPM5/DCD/SPIMISO/PLAI[5]/IRQ3
P4.1/SPM11/SOUT1/AD9/PLAO[9]
P1.7/SPM7/DTR/SPICS/PLAO[0]
P1.6/SPM6/PLAI[6]
P4.0/SPM10/SIN1/AD8/PLAO[8]
P1.3/SPM3/CTS/I2C1SDA/PLAI[3]
P3.7/AD7/PWM
SYNC
/PLAI[15]
P3.6/AD6/PWM
TRIP
/PLAI[14]
51
P2.2/RS/PWM1/PLAO[7]
49
P2.3/SPM12/AE/SIN1
48
IOV
DD
47
IOGND
46
P0.7/SPM8/ECLK/XCLK/PLAO[4]/SIN0
45
P2.0/SPM9/PLAO[5]/CONV
START
/SOUT0
44
P2.7/PWM3/MS3
43
IRQ1/P0.5/ADC
BUSY
/PLAO[2]/MS2
42
IRQ0/P0.4/PWM
TRIP
/PLAO[1]/MS1
41
RST
50
P2.1/WS/PWM0/PLAO[6]
21
DGND
22
LV
DD
23
IOV
DD
24
IOGND
25
P4.6/AD14/PLAO[14]
26
P4.7/AD15/PLAO[15]
27
P0.6/T1/MRST/PLAO[3]/MS3
28
TCK
29
TDO
30
P0.2/PWM5/BHE
31
P3.0/AD0/PWM0/PLAI[8]
32
P3.1/AD1/PWM1/PLAI[9]
33
P3.2/AD2/PWM2/PLAI[10]
34
P3.3/AD3/PWM3/PLAI[11]
35
P2.4/SPM13/PWM0/MS0/SOUT1
36
P0.3/TRST/A16/ADC
BUSY
37
P2.5/PWM1/MS1
38
P2.6/PWM2/MS2
39
P3.4/AD4/PWM4/PLAI[12]
40
P3.5/AD5/PWM5/PLAI[13]
80
ADC3/CMP1
79
ADC2/CMP0
78
ADC1
77
ADC0
76
ADC11
75
GND
REF
74
AGND
73
AGND
72
AV
DD
71
DAC
REF
70
V
REF
69
IOGND
68
IOV
DD
67
P4.5/AD13/PLAO[13]/RTCK
66
P4.4/AD12/PLAO[12]
65
P4.3/AD11/PLAO[11]
64
P4.2/AD10/PLAO[10]
63
P1.0/T1/SPM0/SIN0/I2C0SCL/PLAI[0]
62
P1.1/SPM1/SOUT0/I2C0SDA/PLAI[1]
61
P1.2/SPM2/RTS/I2C1SCL/PLAI[2]
PIN 1
TOP VIEW
09123-108
ADuC7126
Figure 8. ADuC7126 Pin Configuration
Table 10. Pin Function Descriptions (ADuC7126 80-Lead LQFP)
Pin No. Mnemonic Description
1 ADC4 Single-Ended or Differential Analog Input 4.
2 ADC5 Single-Ended or Differential Analog Input 5.
3 ADC6 Single-Ended or Differential Analog Input 6.
4 ADC7 Single-Ended or Differential Analog Input 7.
5 ADC8 Single-Ended or Differential Analog Input 8.
6 ADC9 Single-Ended or Differential Analog Input 9.
7 ADC10 Single-Ended or Differential Analog Input 10.
8 ADCNEG
Bias Point or Negative Analog Input of the ADC in Pseudo Differential Mode. Must be
connected to the ground of the signal to convert. This bias point must be between 0 V
and 1 V.
9 DACGND Ground for the DAC. Typically connected to AGND.
10 DACV
DD
3.3 V Power Supply for the DACs. Must be connected to AV
DD
.