Datasheet

Data Sheet ADuC7060/ADuC7061
Rev. D | Page 37 of 108
Table 34. Typical Current Consumption at 25°C in mA
1
POWCON0[6:3] Mode CD = 0 CD = 1 CD = 2 CD = 3 CD = 4 CD = 5 CD = 6 CD = 7
1111 Active
2
5.22 4.04 2.69 2.01 1.67 1.51 1.42 1.38
1110 Pause
3
2.6 1.95 1.6 1.49 1.4 1.33 1.31 1.3
1100 Nap
3
1.33 1.29 1.29 1.29 1.29 1.29 1.29 1.29
1000 Sleep
3
0.085 0.085 0.085 0.085 0.085 0.085 0.085 0.085
0000 Stop
3
0.055 0.055 0.055 0.055 0.055 0.055 0.055 0.055
1
All values listed in Table 34 have been taken with both ADCs turned off.
2
In active mode, GP0PAR bit 7 =1.
3
The values for pause, nap, sleep, and stop modes are measured with the NTRST pin low. To minimize I
DD
due to nTRST in all modes, set GP0PAR Bit 7 =1. This disables
the internal pull-down on the nTRST pin and means there is no ground path for the external pull-up resistor through the nTRST pin. By default, GP0PAR Bit 7 = 0,
therefore, setting this bit in user code will not affect the
BM
operation.
Name: PLLKEY1
Address: 0xFFFF0410
Default value: 0xXXXX
Access: Write
Function: When writing to the PLLCON register, the
value of 0xAA must be written to this register
in the instruction immediately before writing
to PLLCON.
Name: PLLCON
Address: 0xFFFF0414
Default value: 0x00
Access: Read and write
Function: This register selects the clock input to the PLL.
Table 35. PLLCON MMR Bit Designations
Bit
Name
Description
7:3 Reserved These bits must always be set to 0.
2 EXTCLK Set this bit to 1 to select external clock input
from P2.0.
Clear this bit to disable the external clock.
1:0 OSEL Oscillator selection bits.
[00] = internal 32,768 Hz oscillator.
[01] = internal 32,768 Hz oscillator.
[10] = external crystal.
[11] = internal 32,768 Hz oscillator.
Name: PLLKEY2
Address: 0xFFFF0418
Default value: 0xXXXX
Access: Write
Function: When writing to PLLCON, the value of 0x55
must be written to this register in the
instruction immediately after writing to
PLLCON.