Datasheet

ManualsBrandsANALOG DEVICES ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LFCSP 32 VQ (5x5) 16/32-Bit 10 MHz I/O number 8

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Table Of Contents

Features
Applications
General Description
Revision History
Functional Block Diagram
Specifications
- Electrical Specifications
- Timing Specifications
  - I2C Timing
  - SPI Timing
Absolute Maximum Ratings
- ESD Caution
Pin Configurations and Function Descriptions
Terminology
Overview of the ARM7TDMI Core
- Thumb Mode (T)
- Multiplier (M)
- EmbeddedICE (I)
  - ARM7 Exceptions
- ARM Registers
- Interrupt Latency
- Memory Organization
- Flash/EE Control Interface
- Memory Mapped Registers
- Complete MMR Listing
- Reset
  - RSTSTA Register
  - RSTCLR Register
Oscillator, PLL, and Power Control
- Clocking System
  - External Crystal Selection
  - External Clock Selection
- Power Control System
  - Power and Clock Control Registers
ADC Circuit Information
- Reference Sources
- Diagnostic Current Sources
- Sinc3 Filter
- ADC Chopping
- Programmable Gain Amplifier
- Excitation Sources
- ADC Low Power Mode
- ADC Comparator and Accumulator
- Temperature Sensor
- ADC MMR Interface
- Example Application Circuits
DAC Peripherals
- DAC
  - Op Amp Mode
- MMR Interface
  - DAC0CON Register
  - DAC0DAT Register
- Using the DAC
Nonvolatile Flash/EE Memory
- Flash/EE Memory Reliability
- Programming
  - Serial Downloading (In-Circuit Programming)
  - JTAG Access
Processor Reference Peripherals
- Interrupt System
- IRQ
- Fast Interrupt Request (FIQ)
- Programmed Interrupts
  - SWICFG
    - SWICFG Register
- Vectored Interrupt Controller (VIC)
- VIC MMRs
Timers
- HR:MIN:SEC: 1/128 Format
- Timer0
- Timer1 or Wake-Up Timer
- Timer2 or Watchdog Timer
- Timer3
Pulse-Width Modulator
- Pulse-Width Modulator General Overview
UART Serial Interface
- Baud Rate Generation
  - Normal 450 UART Baud Rate Generation
  - ADuC706x Fractional Divider
- UART Register Definitions
I2C
- Configuring External Pins for I2C Functionality
- Serial Clock Generation
- I2C Bus Addresses
  - Slave Mode
  - Master Mode
- I2C Registers
Serial Peripheral Interface
- MISO (Master In, Slave Out) Pin
- MOSI (Master Out, Slave In) Pin
- SCLK (Serial Clock I/O) Pin
- Slave Select (P0.0/) Input Pin
- Configuring External Pins for SPI Functionality
- SPI Registers
General-Purpose I/O
- GPxCON Registers
- GPxDAT Registers
- GPxSET Registers
- GPxCLR Registers
- GPxPAR Registers
  - GP0CON1 Control Registers
Hardware Design Considerations
- Power Supplies
Outline Dimensions
- Ordering Guide

ADuC7060/ADuC7061 Data Sheet

Rev. D | Page 106 of 108

COMPLIANT TO JEDEC STANDARDS MS-026-BBC

TOP VIEW

(PINS DOWN)

0.27

0.22

0.17

0.50

BSC

LEAD PITCH

1.60

MAX

0.75

0.60

0.45

VIEW A

PIN 1

0.20

0.09

1.45

1.40

1.35

0.08

COPLANARITY

VIEW A

ROTATED 90° CCW

SEATING

PLANE

7°

3.5°

0°

0.15

0.05

9.20

9.00 SQ

8.80

7.20

7.00 SQ

6.80

051706-A

Figure 32. 48-Lead Low Profile Quad Flat Package [LQFP]

(ST-48)

Dimensions shown in millimeters

ORDERING GUIDE

Model

Temperature Range Package Description

Package

Option

Ordering

Quantity

ADuC7060BCPZ32 −40°C to +125°C 48-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-48-3

ADuC7060BCPZ32-RL −40°C to +125°C 48-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-48-3 2,500

ADuC7060BSTZ32 −40°C to +125°C 48-Lead Low Profile Quad Flat Package [LQFP] ST-48

ADuC7060BSTZ32-RL −40°C to +125°C 48-Lead Low Profile Quad Flat Package [LQFP] ST-48 2,000

ADuC7061BCPZ32

−40°C to +125°C

32-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

CP-32-4

ADuC7061BCPZ32-RL −40°C to +125°C 32-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-32-4 5,000

EVAL-ADuC7060QSPZ

ADuC7060 Quick Start Plus Development System

EVAL-ADuC7061MKZ ADuC7061 Quick Start Evaluation System

Z = RoHS Compliant Part.