Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Revision History
- Functional Block Diagram
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Terminology
- Overview of the ARM7TDMI Core
- Thumb Mode (T)
- Multiplier (M)
- EmbeddedICE (I)
- ARM Registers
- Interrupt Latency
- Memory Organization
- Flash/EE Control Interface
- Memory Mapped Registers
- Complete MMR Listing
- Reset
- Oscillator, PLL, and Power Control
- ADC Circuit Information
- Reference Sources
- Diagnostic Current Sources
- Sinc3 Filter
- ADC Chopping
- Programmable Gain Amplifier
- Excitation Sources
- ADC Low Power Mode
- ADC Comparator and Accumulator
- Temperature Sensor
- ADC MMR Interface
- ADC Status Register
- ADC Interrupt Mask Register
- ADC Mode Register
- Primary ADC Control Register
- Auxiliary ADC Control Register
- ADC Filter Register
- ADC Configuration Register
- Primary Channel ADC Data Register
- Auxiliary Channel ADC Data Register
- Primary Channel ADC Offset Calibration Register
- Auxiliary Channel ADC Offset Calibration Register
- Primary Channel ADC Gain Calibration Register
- Auxiliary Channel Gain Calibration Register
- Primary Channel ADC Result Counter Limit Register
- Primary Channel ADC Result Counter Register
- Primary Channel ADC Threshold Register
- Primary Channel ADC Threshold Counter Limit Register
- Primary Channel ADC Threshold Counter Register
- Primary Channel ADC Accumulator Register
- Excitation Current Sources Control Register
- Example Application Circuits
- DAC Peripherals
- Nonvolatile Flash/EE Memory
- Processor Reference Peripherals
- Timers
- Pulse-Width Modulator
- Pulse-Width Modulator General Overview
- PWMCON Control Register
- PWM0COM0 Compare Register
- PWM0COM1 Compare Register
- PWM0COM2 Compare Register
- PWM0LEN Register
- PWM1COM0 Compare Register
- PWM1COM1 Compare Register
- PWM1COM2 Compare Register
- PWM1LEN Register
- PWM2COM0 Compare Register
- PWM2COM1 Compare Register
- PWM2COM2 Compare Register
- PWM2LEN Register
- PWMCLRI Register
- Pulse-Width Modulator General Overview
- UART Serial Interface
- Baud Rate Generation
- UART Register Definitions
- I2C
- Configuring External Pins for I2C Functionality
- Serial Clock Generation
- I2C Bus Addresses
- I2C Registers
- I2C Master Registers
- I2C Master Control, I2CMCON Register
- I2C Master Status, I2CMSTA, Register
- I2C Master Receive, I2CMRX, Register
- I2C Master Transmit, I2CMTX, Register
- I2C Master Read Count, I2CMCNT0, Register
- I2C Master Current Read Count, I2CMCNT1, Register
- I2C Address 0, I2CADR0, Register
- I2C Address 1, I2CADR1, Register
- I2C Master Clock Control, I2CDIV, Register
- I2C Slave Registers
- I2C Common Registers
- I2C Master Registers
- Serial Peripheral Interface
- General-Purpose I/O
- Hardware Design Considerations
- Outline Dimensions

Data Sheet ADuC7060/ADuC7061
Rev. D | Page 103 of 108
Table 120. GPxPAR MMR Bit Designations
Bit Name Description
31:15 Reserved.
23:16 GPL[7:0] General I/O port pin functionality lock
registers.
GPL[7:0] = 0, normal operation.
GPL[7:0] = 1, for each GPIO pin, if this bit is
set, writing to the corresponding bit in
GPxCON or GPxDAT register bit has no
effect.
15:8 GPDS[7:0] Drive strength configuration. This bit is
configurable.
GPDS[x] = 0, maximum source current is 2 mA.
GPDS[x] = 1, maximum source current is 4 mA.
7:0
GPPD[7:0]
Pull-Up Disable Port x[7:0].
GPPD[x] = 0, pull-up resistor is active.
GPPD[x] = 1, pull-up resistor is disabled.
GP0CON1 Control Registers
The GP0CON1 write values are as follows: GP0KEY1 = 0x7,
GP0CON1 = user value, and GP0KEY2 = 0x13.
Name: GP0CON1
Address: 0xFFFF0468
Default value: 0x00
Access: Read and write
Function: This register controls the P0.0, P0.1, P0.2, and
P0.3 functionality of the multifunction GPIO
pins.
Table 121. GP0CON1 Write Sequence
Name Value
GP0KEY1 0x7
GP0CON1 User value
GP0KEY2 0x13
Table 122. GP0CON1 MMR Bit Designations
Bit Name Description
7:2 Reserve
d
These bits must always be set to 0.
1 SPII2CS
EL
This bit configures the P0.0 to P0.3 functions
in I
2
C or SPI mode. Note that Bit 0 of GP0CON1
must be set to 0 for this bit to work.
To select the P0.0, P0.1, P0.2, and P0.3
functions in SPI mode, clear this bit to 0.
To select the P0.0, P0.1, P0.2, and P0.3
functions in I
2
C mode, set this bit to 1.
This bit is cleared by default.
0 ADCSEL This bit configures the P0.0 to P0.3 functions
as GPIO pins or as ADC input pins.
To enable P0.0, P0.1, P0.2 and P0.3 functions
as ADC inputs, set this bit to 1.
To enable P0.0, P0.1, P0.2, and P0.3 functions
as digital I/O, clear this bit to 0.
This bit is cleared by default.
Name GP0KEY1
Address: 0xFFFF0464
Default value: 0xXXXX
Access: Write only
Function: When writing to GP0CON1, the value of 0x07
must be written to this register in the
instruction immediately before writing to
GP0CON1.
Name: GP0KEY2
Address: 0xFFFF046C
Default value: 0xXXXX
Access: Write only
Function: When writing to GP0CON1, the value of 0x13
must be written to this register in the instruction
immediately after writing to GP0CON1.