Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Revision History
- Functional Block Diagram
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Terminology
- Overview of the ARM7TDMI Core
- Thumb Mode (T)
- Multiplier (M)
- EmbeddedICE (I)
- ARM Registers
- Interrupt Latency
- Memory Organization
- Flash/EE Control Interface
- Memory Mapped Registers
- Complete MMR Listing
- Reset
- Oscillator, PLL, and Power Control
- ADC Circuit Information
- Reference Sources
- Diagnostic Current Sources
- Sinc3 Filter
- ADC Chopping
- Programmable Gain Amplifier
- Excitation Sources
- ADC Low Power Mode
- ADC Comparator and Accumulator
- Temperature Sensor
- ADC MMR Interface
- ADC Status Register
- ADC Interrupt Mask Register
- ADC Mode Register
- Primary ADC Control Register
- Auxiliary ADC Control Register
- ADC Filter Register
- ADC Configuration Register
- Primary Channel ADC Data Register
- Auxiliary Channel ADC Data Register
- Primary Channel ADC Offset Calibration Register
- Auxiliary Channel ADC Offset Calibration Register
- Primary Channel ADC Gain Calibration Register
- Auxiliary Channel Gain Calibration Register
- Primary Channel ADC Result Counter Limit Register
- Primary Channel ADC Result Counter Register
- Primary Channel ADC Threshold Register
- Primary Channel ADC Threshold Counter Limit Register
- Primary Channel ADC Threshold Counter Register
- Primary Channel ADC Accumulator Register
- Excitation Current Sources Control Register
- Example Application Circuits
- DAC Peripherals
- Nonvolatile Flash/EE Memory
- Processor Reference Peripherals
- Timers
- Pulse-Width Modulator
- Pulse-Width Modulator General Overview
- PWMCON Control Register
- PWM0COM0 Compare Register
- PWM0COM1 Compare Register
- PWM0COM2 Compare Register
- PWM0LEN Register
- PWM1COM0 Compare Register
- PWM1COM1 Compare Register
- PWM1COM2 Compare Register
- PWM1LEN Register
- PWM2COM0 Compare Register
- PWM2COM1 Compare Register
- PWM2COM2 Compare Register
- PWM2LEN Register
- PWMCLRI Register
- Pulse-Width Modulator General Overview
- UART Serial Interface
- Baud Rate Generation
- UART Register Definitions
- I2C
- Configuring External Pins for I2C Functionality
- Serial Clock Generation
- I2C Bus Addresses
- I2C Registers
- I2C Master Registers
- I2C Master Control, I2CMCON Register
- I2C Master Status, I2CMSTA, Register
- I2C Master Receive, I2CMRX, Register
- I2C Master Transmit, I2CMTX, Register
- I2C Master Read Count, I2CMCNT0, Register
- I2C Master Current Read Count, I2CMCNT1, Register
- I2C Address 0, I2CADR0, Register
- I2C Address 1, I2CADR1, Register
- I2C Master Clock Control, I2CDIV, Register
- I2C Slave Registers
- I2C Common Registers
- I2C Master Registers
- Serial Peripheral Interface
- General-Purpose I/O
- Hardware Design Considerations
- Outline Dimensions

ADuC7060/ADuC7061 Data Sheet
Rev. D | Page 6 of 108
Parameter Test Conditions/Comments Min Typ Max Unit
ADC SPECIFICATIONS: ANALOG
INPUT
Internal V
REF
= 1.2 V
Main Channel
Absolute Input Voltage Range Applies to both VIN+ and VIN− 0.1 V
DD
− 0.7 V
Input Voltage Range Gain = 1
1
0 1.2 V
(Differential Voltage
Between AIN+ and AIN–)
Gain = 2
1
0 600 mV
Gain = 4
1
0 300 mV
Gain = 8
1
0 150 mV
Gain = 16
1
0 75 mV
Gain = 32
1
0 37.5 mV
Gain = 64
1
0 18.75 mV
Gain = 128
1
0 9.375 mV
Common Mode Voltage, V
CM
10
V
CM
= (AIN(+) + AIN(−))/2,
gain = 4 to 128
0.5 V
Input Leakage Current
1
ADC0 and ADC1 10 18
1
nA
ADC2, ADC3, ADC4, and ADC5 15 30
1
nA
ADC6, ADC7, ADC8, and ADC9,
VREF+, VREF−
15 25
1
nA
Common-Mode Rejection DC
1
On ADC Input ADC = 7.8 mV 113 dB
ADC = 1 V
1
95 dB
Common-Mode Rejection
50 Hz/60 Hz
1
50 Hz/60 Hz ± 1 Hz, 16.6 Hz and
50 Hz update rate, chop on
ADC = 7.8 mV, range ± 20 mV 95 dB
ADC = 1 V, range ± 1.2 V 90 dB
Normal-Mode Rejection
50 Hz/60 Hz
1
On ADC Input 50 Hz/60 Hz ± 1 Hz, 16.6 Hz f
ADC
,
chop on
75 dB
50 Hz/60 Hz ± 1 Hz, 16.6 Hz f
ADC
,
chop off
67 dB
Auxiliary Channel
Absolute Input Voltage
Range
1
Buffer enabled 0.1 AVDD − 0.1 V
Buffer disabled AGND AVDD V
Input Voltage Range Range-based reference source 0 1.2 V
Common-Mode Rejection DC
1
On ADC Input ADC = 1 V
1
87 dB
Common-Mode Rejection
50 Hz/60 Hz
1
50 Hz/60 Hz ± 1 Hz, 16.6 Hz and
50 Hz update rate, chop on
ADC = 1 V, range ± 1.2 V 90 dB
Normal-Mode Rejection
50 Hz/60 Hz
1
On ADC Input 50 Hz/60 Hz ± 1 Hz, 16.6 Hz f
ADC
,
chop on
75 dB
50 Hz/60 Hz ± 1 Hz, 16.6 Hz f
ADC
,
chop off
67 dB
VOLTAGE REFERENCE
ADC Precision Reference
Internal V
REF
1.2 V
Initial Accuracy
Measured at T
A
= 25°C −0.1 +0.1 %
Reference Temperature
Coefficient (Tempco)
1, 11
−20 ±10 +20 ppm/°C
Power Supply Rejection
1
70 dB