Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Revision History
- Functional Block Diagram
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Terminology
- Overview of the ARM7TDMI Core
- Thumb Mode (T)
- Multiplier (M)
- EmbeddedICE (I)
- ARM Registers
- Interrupt Latency
- Memory Organization
- Flash/EE Control Interface
- Memory Mapped Registers
- Complete MMR Listing
- Reset
- Oscillator, PLL, and Power Control
- ADC Circuit Information
- Reference Sources
- Diagnostic Current Sources
- Sinc3 Filter
- ADC Chopping
- Programmable Gain Amplifier
- Excitation Sources
- ADC Low Power Mode
- ADC Comparator and Accumulator
- Temperature Sensor
- ADC MMR Interface
- ADC Status Register
- ADC Interrupt Mask Register
- ADC Mode Register
- Primary ADC Control Register
- Auxiliary ADC Control Register
- ADC Filter Register
- ADC Configuration Register
- Primary Channel ADC Data Register
- Auxiliary Channel ADC Data Register
- Primary Channel ADC Offset Calibration Register
- Auxiliary Channel ADC Offset Calibration Register
- Primary Channel ADC Gain Calibration Register
- Auxiliary Channel Gain Calibration Register
- Primary Channel ADC Result Counter Limit Register
- Primary Channel ADC Result Counter Register
- Primary Channel ADC Threshold Register
- Primary Channel ADC Threshold Counter Limit Register
- Primary Channel ADC Threshold Counter Register
- Primary Channel ADC Accumulator Register
- Excitation Current Sources Control Register
- Example Application Circuits
- DAC Peripherals
- Nonvolatile Flash/EE Memory
- Processor Reference Peripherals
- Timers
- Pulse-Width Modulator
- Pulse-Width Modulator General Overview
- PWMCON Control Register
- PWM0COM0 Compare Register
- PWM0COM1 Compare Register
- PWM0COM2 Compare Register
- PWM0LEN Register
- PWM1COM0 Compare Register
- PWM1COM1 Compare Register
- PWM1COM2 Compare Register
- PWM1LEN Register
- PWM2COM0 Compare Register
- PWM2COM1 Compare Register
- PWM2COM2 Compare Register
- PWM2LEN Register
- PWMCLRI Register
- Pulse-Width Modulator General Overview
- UART Serial Interface
- Baud Rate Generation
- UART Register Definitions
- I2C
- Configuring External Pins for I2C Functionality
- Serial Clock Generation
- I2C Bus Addresses
- I2C Registers
- I2C Master Registers
- I2C Master Control, I2CMCON Register
- I2C Master Status, I2CMSTA, Register
- I2C Master Receive, I2CMRX, Register
- I2C Master Transmit, I2CMTX, Register
- I2C Master Read Count, I2CMCNT0, Register
- I2C Master Current Read Count, I2CMCNT1, Register
- I2C Address 0, I2CADR0, Register
- I2C Address 1, I2CADR1, Register
- I2C Master Clock Control, I2CDIV, Register
- I2C Slave Registers
- I2C Common Registers
- I2C Master Registers
- Serial Peripheral Interface
- General-Purpose I/O
- Hardware Design Considerations
- Outline Dimensions

ADuC7060/ADuC7061 Data Sheet
Rev. D | Page 46 of 108
Auxiliary ADC Control Register
Name: ADC1CON
Address: 0xFFFF0510
Default value: 0x0000
Access: Read and write
Function: The auxiliary ADC control MMR is a 16-bit register.
Table 44. ADC1CON MMR Bit Designations
Bit Name Description
15 ADC1EN Auxiliary channel ADC enable.
This bit is set to 1 by user code to enable the auxiliary ADC.
Clearing this bit to 0 powers down the auxiliary ADC.
14:13 ADC1DIAG[1:0] Diagnostic current source enable bits. This is the same current source as that used on ADC0DIAG[1:0]. The
ADCs cannot enable the diagnostic current sources at the same time.
[00]= current sources off.
[01] = enables a 50 μA current source on selected positive input (for example, ADC2).
[10] = enables a 50 μ A current source on selected negative input (for example, ADC3).
[11] = enables a 50 μ A current source on both selected inputs (for example, ADC2 and ADC3).
12 HIGHEXTREF1 This bit must be set high if the external reference for ADC1 exceeds 1.35 V. This results in the reference
source being divided by 2.
Clear this bit when using the internal reference or an external reference of less than 1.35 V.
11 ADC1CODE Auxiliary channel ADC output coding.
This bit is set to 1 by user code to configure auxiliary ADC output coding as unipolar.
This bit is cleared to 0 by user code to configure auxiliary ADC output coding as twos complement.
10:7 ADC1CH[3:0] Auxiliary channel ADC input select. Note: Single-ended channels are selected with respect to ADC5. Bias
ADC5 to a minimum level of 0.1 V.
[0000] = ADC2/ADC3 (differential mode).
[0001] = ADC4/ADC5 (differential mode).
[0010] = ADC6/ADC7 (differential mode).
[0011] = ADC8/ADC9 (differential mode).
[0100] = ADC2/ADC5 (single-ended mode).
[0101] = ADC3/ADC5 (single-ended mode).
[0110] = ADC4/ADC5 (single-ended mode).
[0111] = ADC6/ADC5 (single-ended mode).
[1000] = ADC7/ADC5 (single-ended mode).
[1001] = ADC8/ADC5 (single-ended mode).
[1010] = ADC9/ADC5 (single-ended mode).
[1011] = internal temperature sensor+/internal temperature sensor−.
[1100] = VREF+, VREF−. Note: This is the reference selected by the ADC1REF bits.
[1101] = DAC_OUT/AGND.
[1110] = undefined.
[1111] = internal short to ADC3.