Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Revision History
- Functional Block Diagram
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Terminology
- Overview of the ARM7TDMI Core
- Thumb Mode (T)
- Multiplier (M)
- EmbeddedICE (I)
- ARM Registers
- Interrupt Latency
- Memory Organization
- Flash/EE Control Interface
- Memory Mapped Registers
- Complete MMR Listing
- Reset
- Oscillator, PLL, and Power Control
- ADC Circuit Information
- Reference Sources
- Diagnostic Current Sources
- Sinc3 Filter
- ADC Chopping
- Programmable Gain Amplifier
- Excitation Sources
- ADC Low Power Mode
- ADC Comparator and Accumulator
- Temperature Sensor
- ADC MMR Interface
- ADC Status Register
- ADC Interrupt Mask Register
- ADC Mode Register
- Primary ADC Control Register
- Auxiliary ADC Control Register
- ADC Filter Register
- ADC Configuration Register
- Primary Channel ADC Data Register
- Auxiliary Channel ADC Data Register
- Primary Channel ADC Offset Calibration Register
- Auxiliary Channel ADC Offset Calibration Register
- Primary Channel ADC Gain Calibration Register
- Auxiliary Channel Gain Calibration Register
- Primary Channel ADC Result Counter Limit Register
- Primary Channel ADC Result Counter Register
- Primary Channel ADC Threshold Register
- Primary Channel ADC Threshold Counter Limit Register
- Primary Channel ADC Threshold Counter Register
- Primary Channel ADC Accumulator Register
- Excitation Current Sources Control Register
- Example Application Circuits
- DAC Peripherals
- Nonvolatile Flash/EE Memory
- Processor Reference Peripherals
- Timers
- Pulse-Width Modulator
- Pulse-Width Modulator General Overview
- PWMCON Control Register
- PWM0COM0 Compare Register
- PWM0COM1 Compare Register
- PWM0COM2 Compare Register
- PWM0LEN Register
- PWM1COM0 Compare Register
- PWM1COM1 Compare Register
- PWM1COM2 Compare Register
- PWM1LEN Register
- PWM2COM0 Compare Register
- PWM2COM1 Compare Register
- PWM2COM2 Compare Register
- PWM2LEN Register
- PWMCLRI Register
- Pulse-Width Modulator General Overview
- UART Serial Interface
- Baud Rate Generation
- UART Register Definitions
- I2C
- Configuring External Pins for I2C Functionality
- Serial Clock Generation
- I2C Bus Addresses
- I2C Registers
- I2C Master Registers
- I2C Master Control, I2CMCON Register
- I2C Master Status, I2CMSTA, Register
- I2C Master Receive, I2CMRX, Register
- I2C Master Transmit, I2CMTX, Register
- I2C Master Read Count, I2CMCNT0, Register
- I2C Master Current Read Count, I2CMCNT1, Register
- I2C Address 0, I2CADR0, Register
- I2C Address 1, I2CADR1, Register
- I2C Master Clock Control, I2CDIV, Register
- I2C Slave Registers
- I2C Common Registers
- I2C Master Registers
- Serial Peripheral Interface
- General-Purpose I/O
- Hardware Design Considerations
- Outline Dimensions

Data Sheet ADuC7060/ADuC7061
Rev. D | Page 39 of 108
Table 36. Primary ADC—Typical Output RMS Noise in Normal Mode (μV)
ADC
Register
Status
Data
Update
Rate
Input Voltage Noise (mV)
±1.2 V
(PGA = 1)
±600 mV
(PGA = 2)
±300 mV
(PGA = 4)
±150 mV
(PGA = 8)
±75 mV
(PGA = 16)
±37.5 mV
(PGA = 32)
±18.75 mV
(PGA = 64)
±9.375 mV
(PGA = 128)
±4.68 mV
(PGA = 256)
±2.34 mV
(PGA = 512)
Chop On 4 Hz 0.62 μV 0.648 μV 0.175 μV 0.109 μV 0.077 μV 0.041 μV 0.032 μV 0.0338 μV 0.032 μV 0.033 μV
Chop Off 50 Hz 1.97 μV 1.89 μV 0.570 μV 0.38 μV 0.27 μV 0.147 μV 0.123 μV 0.12 μV 0.098 μV 0.098 μV
Chop Off 1 kHz 8.54 μV 8.4 μV 2.55 μV 1.6 μV 1.17 μV 0.658 μV 0.53 μV 0.55 μV 0.56 μV 0.52 μV
Chop Off 8 kHz 54.97 μV 55.54 μV 14.30 μV 7.88 μV 4.59 μV 2.5 μV 1.71 μV 1.75 μV 0.915 μV 0.909 μV
Table 37. Primary ADC—Typical Output RMS Effective Number of Bits in Normal Mode (Peak-to-Peak Bits in Parentheses)
ADC
Register
Status
Data
Update
Rate
Input Voltage Noise (mV)
±1.2 V
(PGA = 1)
±600 mV
(PGA = 2)
±300 mV
(PGA = 4)
±150 mV
(PGA = 8)
±75 mV
(PGA = 16)
±37.5 mV
(PGA = 32)
±18.75 mV
(PGA = 64)
±9.375 mV
(PGA = 128)
±4.68 mV
(PGA = 256)
±2.34 mV
(PGA = 512)
Chop On 4 Hz
21.9
(19.1 p-p)
20.8
(18.1 p-p)
21.7
(19.0 p-p)
21.4
(18.7 p-p)
20.9
(18.2 p-p)
20.8
(18.1 p-p)
20.2
(17.4 p-p)
19.1
(16.4 p-p)
18.2
(15.4 p-p)
17.1
(14.4 p-p)
Chop Off 50 Hz
20.2
(17.5 p-p)
19.3
(16.6 p-p)
20.0
(17.3 p-p)
19.6
(16.9 p-p)
19.1
(16.4 p-p)
19.0
(16.2 p-p)
18.2
(15.5 p-p)
17.3
(14.6 p-p)
16.6
(13.8 p-p)
15.5
(12.8 p-p)
Chop Off 1 kHz
18.1
(15.3 p-p)
17.1
(14.4 p-p)
17.8
(15.1 p-p)
17.5
(14.8 p-p)
17.0
(14.2 p-p)
16.8
(14.1 p-p)
16.1
(13.4 p-p)
15.1
(12.3 p-p)
14.0
(11.3 p-p)
13.1
(10.4 p-p)
Chop Off 8 kHz
15.4
(12.7 p-p)
14.4
(11.7 p-p)
15.4
(12.6 p-p)
15.2
(12.5 p-p)
15.0
(12.3 p-p)
14.9
(12.2 p-p)
14.4
(11.7 p-p)
13.4
(10.7 p-p)
13.3
(10.6 p-p)
12.3
(9.6 p-p)
Table 38. Auxilary ADC—Typical Output RMS Noise
ADC Register
Data
Update Rate RMS Value
Chop On 4 Hz 0.633 μV
Chop On 10 Hz 0.810 μV
Chop Off 1 kHz 7.4 μV
Chop Off
8 kHz
54.18
μ
V
REFERENCE SOURCES
Both the primary and auxiliary ADCs have the option of using
the internal reference voltage or one of two external differential
reference sources. The first external reference is applied to the
VREF+/VREF− pins. The second external reference is applied
to the ADC4/EXT_REF2IN+ and ADC5/EXT_REF2IN− pins.
By default, each ADC uses the internal 1.2 V reference source.
For details on how to configure the external reference source for
the primary ADC, see the description of the ADC0REF[1:0]
bits in the ADC0 control register, ADC0CON.
For details on how to configure the external reference source for
the auxiliary ADC, see the description of the ADC1REF[2:0]
bits in the ADC1 control register, ADC1CON.
If an external reference source of greater than 1.35 V is needed
for ADC0, the HIGHEXTREF0 bit must be set in ADC0CON.
Similarly, if an external reference source of greater than 1.35 V
is used for ADC1, the HIGHEXTREF1 bit must be set in
ADC1CON.
DIAGNOSTIC CURRENT SOURCES
To detect a connection failure to an external sensor, the ADuC706x
incorporates a 50 μA constant current source on the selected
analog input channels to both the primary and auxiliary ADCs.
The diagnostic current sources for the primary ADC analog
inputs are controlled by the ADC0DIAG[1:0] bits in the
ADC0CON register.
Similarly, the diagnostic current sources for the auxiliary ADC
analog inputs are controlled by the ADC1DIAG[1:0] bits in the
ADC1CON register.
ADC1 (–)
ADC0 (+)
AVDD
R1
A B
R2
A B
VIN =
ADC0,
ADC1
07079-010
Figure 15. Example Circuit Using Diagnostic Current Sources