Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Revision History
- Functional Block Diagram
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Terminology
- Overview of the ARM7TDMI Core
- Thumb Mode (T)
- Multiplier (M)
- EmbeddedICE (I)
- ARM Registers
- Interrupt Latency
- Memory Organization
- Flash/EE Control Interface
- Memory Mapped Registers
- Complete MMR Listing
- Reset
- Oscillator, PLL, and Power Control
- ADC Circuit Information
- Reference Sources
- Diagnostic Current Sources
- Sinc3 Filter
- ADC Chopping
- Programmable Gain Amplifier
- Excitation Sources
- ADC Low Power Mode
- ADC Comparator and Accumulator
- Temperature Sensor
- ADC MMR Interface
- ADC Status Register
- ADC Interrupt Mask Register
- ADC Mode Register
- Primary ADC Control Register
- Auxiliary ADC Control Register
- ADC Filter Register
- ADC Configuration Register
- Primary Channel ADC Data Register
- Auxiliary Channel ADC Data Register
- Primary Channel ADC Offset Calibration Register
- Auxiliary Channel ADC Offset Calibration Register
- Primary Channel ADC Gain Calibration Register
- Auxiliary Channel Gain Calibration Register
- Primary Channel ADC Result Counter Limit Register
- Primary Channel ADC Result Counter Register
- Primary Channel ADC Threshold Register
- Primary Channel ADC Threshold Counter Limit Register
- Primary Channel ADC Threshold Counter Register
- Primary Channel ADC Accumulator Register
- Excitation Current Sources Control Register
- Example Application Circuits
- DAC Peripherals
- Nonvolatile Flash/EE Memory
- Processor Reference Peripherals
- Timers
- Pulse-Width Modulator
- Pulse-Width Modulator General Overview
- PWMCON Control Register
- PWM0COM0 Compare Register
- PWM0COM1 Compare Register
- PWM0COM2 Compare Register
- PWM0LEN Register
- PWM1COM0 Compare Register
- PWM1COM1 Compare Register
- PWM1COM2 Compare Register
- PWM1LEN Register
- PWM2COM0 Compare Register
- PWM2COM1 Compare Register
- PWM2COM2 Compare Register
- PWM2LEN Register
- PWMCLRI Register
- Pulse-Width Modulator General Overview
- UART Serial Interface
- Baud Rate Generation
- UART Register Definitions
- I2C
- Configuring External Pins for I2C Functionality
- Serial Clock Generation
- I2C Bus Addresses
- I2C Registers
- I2C Master Registers
- I2C Master Control, I2CMCON Register
- I2C Master Status, I2CMSTA, Register
- I2C Master Receive, I2CMRX, Register
- I2C Master Transmit, I2CMTX, Register
- I2C Master Read Count, I2CMCNT0, Register
- I2C Master Current Read Count, I2CMCNT1, Register
- I2C Address 0, I2CADR0, Register
- I2C Address 1, I2CADR1, Register
- I2C Master Clock Control, I2CDIV, Register
- I2C Slave Registers
- I2C Common Registers
- I2C Master Registers
- Serial Peripheral Interface
- General-Purpose I/O
- Hardware Design Considerations
- Outline Dimensions

Data Sheet ADuC7060/ADuC7061
Rev. D | Page 101 of 108
GENERAL-PURPOSE I/O
The ADuC706x features up to 16 general-purpose bidirectional
input/output (GPIO) pins. In general, many of the GPIO pins have
multiple functions that are configurable by user code. By default,
the GPIO pins are configured in GPIO mode. All GPIO pins have
an internal pull-up resistor with a drive capability of 1.6 mA.
All I/O pins are 3.3 V tolerant, meaning that the GPIOs support
an input voltage of 3.3 V.
When the ADuC706x enters power-saving mode, the GPIO
pins retain their state.
The GPIO pins are grouped into three port buses.
Table 110 lists all the GPIO pins and their alternative functions.
A GPIO pin alternative function can be selected by writing to
the correct bits of the GPxCON register.
Table 110. GPIO Multifunction Pin Descriptions
Port
Configuration via GPxCON Including GP0CON0
Pin Mnemonic 00 01
0 P0.0/
SS
GPIO
SS
(SPI slave select).
P0.1/SCLK/SCL GPIO SCLK/SCL (serial clock/SPI clock).
P0.2/MISO GPIO MISO (SPI—master in/slave out).
P0.3/MOSI/SDA GPIO MOSI (SPI—master out/slave in).
P0.4/IRQ0/PWM1 GPIO/IRQ0 PWM1 (PWM Output 1).
P0.5/CTS GPIO CTS. UART clear to send pin.
P0.6/RTS GPIO RTS. UART request to send pin.
1 P1.0/IRQ1/SIN/T0 GPIO/IRQ1 SIN (serial input).
P1.1/SOUT GPIO SOUT (serial output).
P1.2/SYNC GPIO PWM sync (PWM sync input pin).
P1.3/TRIP GPIO PWM trip (PWM trip input pin).
P1.4/PWM2
GPIO
PWM2 (PWM Output 2).
P1.5/PWM3 GPIO PWM3 (PWM Output 3).
P1.6/PWM4 GPIO PWM4 (PWM Output 4).
2
P2.0/IRQ2/PWM0/EXTCLK
GPIO/IRQ2/EXTCLK
PWM0 (PWM Output 0).
P2.1/IRQ3/PWM5 GPIO/IRQ3 PWM5 (PWM Output 5).
GPxCON REGISTERS
GPxCON are the Port x (where x is 0, 1, or 2) control registers, which select the function of each pin of Port x as described in Table 112.
Table 111. GPxCON Registers
Name Address Default Value Access
GP0CON0 0xFFFF0D00 0x00000000 R/W
GP1CON 0xFFFF0D04 0x00000000 R/W
GP2CON 0xFFFF0D08 0x00000000 R/W