Datasheet

Data Sheet ADuC7060/ADuC7061
Rev. D | Page 85 of 108
Table 95. COMIID0 MMR Bit Designations
Status
Bits[2:1] Bit 0 Priority Definition
Clearing
Operation
00 1 No interrupt
11 0 1 Receive line
status
interrupt
Read
COMSTA0
10 0 2 Receive
buffer full
interrupt
Read COMRX
01 0 3 Transmit
buffer empty
interrupt
Write data to
COMTX or
read COMIID0
00 0 4 Modem
status
interrupt
Read
COMSTA1
register
UART Fractional Divider Register
This 16-bit register (COMDIV2) controls the operation of the
fractional divider for the ADuC706x.
COMDIV2 Register
Name: COMDIV2
Address: 0xFFFF072C
Default value: 0x0000
Access: Read and write
Table 96. COMDIV2 MMR Bit Designations
Bit Name Description
15 FBEN Fractional baud rate generator enable bit.
Set by user to enable the fractional baud
rate generator.
Cleared by user to generate the baud rate
using the standard 450 UART baud rate
generator.
14:13
Reserved.
12:11 FBM[1:0] M. If FBM = 0, M = 4. See Equation 2 for the
calculation of the baud rate using a
fractional divider and Table 88 for common
baud rate values.
10:0 FBN[10:0] N. See Equation 2 for the calculation of the
baud rate using a fractional divider and
Table 88 for common baud rate values.