Datasheet

ADuC7060/ADuC7061 Data Sheet
Rev. D | Page 74 of 108
Table 83. T3CON MMR Bit Designations
Bit Name Description
31:18 Reserved.
17 T3CAPEN Event enable bit.
Set by user to enable time capture of an event.
Cleared by user to disable time capture of an event.
16:12 T3CAPSEL Event select range, 0 to 17. The events are described in Table 78.
11 Reserved.
10:9 T3CLKSEL Clock select.
[00] = 32.768 kHz oscillator.
[01] = 10.24 MHz/CD.
[10] = 10.24 MHz.
[11] = reserved.
8 T3DIR Count up.
Set by user for Timer3 to count up.
Cleared by user for Timer3 to count down (default).
7 T3EN Timer3 enable bit.
Set by user to enable Timer3.
Cleared by user to disable Timer3 (default).
6 T3MOD Timer3 mode.
Set by user to operate in periodic mode.
Cleared by user to operate in free running mode (default mode).
5:4
Reserved.
3:0 T3SCALE Prescaler.
[0000] = source clock/1 (default).
[0100] = source clock/16.
[1000] = source clock/256.
[1111] = source clock/32,768.