Datasheet

ADuC7033
Rev. B | Page 99 of 140
HIGH VOLTAGE PERIPHERAL CONTROL INTERFACE
The ADuC7033 integrates a number of high voltage circuit
functions that are controlled and monitored through a regis-
tered interface consisting of two MMRs, namely, HVCON and
HVDAT. The HVCON register acts as a command byte interpreter
allowing the microcontroller to indirectly read or write 8-bit
data (the value in HVDAT) from or to one of four high voltage
status or configuration registers. These high voltage registers are
not MMRs but registers commonly referred to as indirect
registers, that is, they can only be accessed (as the name
suggests) indirectly via the HVCON and HVDAT MMRs.
The physical interface between the HVCON register and the
indirect high voltage registers is a 2-wire (data and clock) serial
interface based on a 2.56 MHz serial clock. Therefore, there is a
finite, 10 µs (maximum) latency between the MCU core writing
a command into HVCON and that command or data reaching
the indirect high voltage registers. There is also a finite 10 µs
latency between the MCU core writing a command into HVCON
and indirect register data being read back into the HVDAT
register. A busy bit (Bit 0 of the HVCON when read by MCU)
can be polled by the MCU to confirm when a read/write
command is complete.
Figure  shows the top level architecture of the high voltage
in
ter
face and related circuits. The following high voltage circuit
functions are controlled and monitored via this interface:
• Precision oscillator
• Wake-up (W U) pin functionality
• Power supply monitor (PSM)
• Low voltage flag (LVF)
• LIN operating modes
• STI diagnostics
• High voltage diagnostics
• High voltage attenuator/buffer circuit
• High voltage (HV) temperature monitor
ARM7
MCU
AND
PERIPHERALS
HIGH VOLTAGE
INTERFACE
MMRs
HVCON
HVDAT
PRECISION
OSCILLATOR
HVCFG0[6]
LVFHVCFG0[2]
LIN
MODES
PSMHVCFG0[3]
ATTENUATOR
AND
BUFFER
HVCFG1[5]
HVCFG1[7]
HV TEMP
MONITOR
HVCFG1[6]
HVCFG1[3]
HVCFG0
(INDIRECT)
HIGH VOLTAGE
REGISTERS
HVCFG1
HVSTA
HVMON
SERIAL
INTERFACE
CONTROLLER
SERIAL
DATA
SERIAL
CLOCK
HIGH VOLTAGE
INTERRUPT
CONTROLLER
PSM—HVSTA[5]
WU—HVSTA[4]
OVER TEMP—HVSTA[3]
LIN S-SCT—HVSTA[2]
STI S-SCT—HVSTA[1]
WU S-SCT—HVSTA[0]
IRQ3
(IRQEN[16])
HIGH VOLTAGE
DIAGNOSTIC
CONTROLLER
WU DIAGNOSTIC INPUT
HVCFG0[4]
STI DIAGNOSTIC INPUT
P2.6
LIN DIAGNOSTIC INPUT
P2.5
WU DIAGNOSTIC OUTPUT
HVMON[7]
STI DIAGNOSTIC OUTPUT
HVMON[5]
LIN DIAGNOSTIC OUTPUT
P2.4
HVCFG0[5]
HVCFG0[1:0]
WU I/O
CONTROL
HVCFG0[4]
HVCFG1[4]
HVCFG1[4]
STI I/O
CONTROL
HVCFG1[3]
06847-036
Figure 40. High Voltage Interface, Top Level Block Diagram