Datasheet

ADuC7033
Rev. B | Page 89 of 140
Table 58. External GPIO Pin to Internal Port Signal Assignments
Port GPIO Pin Port Signal Functionality (Defined by GPxCON)
Port0 GPIO_0 P0.0 General-Purpose I/O.
IRQ0 External Interrupt Request 0.
SS
Slave Select I/O for SPI.
GPIO_1 P0.1 General-Purpose I/O.
SCLK Serial Clock I/O for SPI.
GPIO_2 P0.2 General-Purpose I/O.
MISO Master Input, Slave Output for SPI.
GPIO_3 P0.3 General-Purpose I/O.
MOSI Master Output, Slave Input for SPI.
GPIO_4 P0.4 General-Purpose I/O.
ECLK 2.56 MHz Clock Output.
P0.5
1
High Voltage Serial Interface.
P0.6
1
High Voltage Serial Interface.
Port1 GPIO_5 P1.0 General-Purpose I/O.
IRQ1 External Interrupt Request 1.
RxD RxD Pin for UART.
GPIO_6 P1.1 General-Purpose I/O.
TxD TxD Pin for UART.
Port2 GPIO_7 Port2.0 General-Purpose I/O.
IRQ4 External Interrupt Request 4.
LIN output pin Used to read directly from LIN pin for conformance testing.
GPIO_8 P2.1 General-Purpose I/O.
IRQ5 External Interrupt Request 5.
LIN input pin Used to directly drive LIN pin for conformance testing.
GPIO_11
2
P2.4
2
General-Purpose I/O; LIN/BSD Input Pin.
GPIO_12
2
P2.5
2
General-Purpose I/O; LIN/BSD Output Pin.
GPIO_13
1
P2.6
1
General-Purpose I/O; STI Data Output.
1
These signals are internal signals only and do not appear on an external pin. These pins are used along with HVCON as the 2-wire interface to the high voltage
interface circuits.
2
These pins/signals are internal signals only and do not appear on an external pin. Both signals are used to provide external pin diagnostic write (GPIO_12) and
readback (GPIO_11) capability.