Datasheet

ADuC7033
Rev. B | Page 87 of 140
Table 57. T4CON MMR Bit Designations
Bit Description
31 to 18 Reserved.
17 Event Select Bit.
Set by user to enable time capture of an event.
Cleared by user to disable time capture of an event.
16 to 12 Event Select Range, 0 to 31. The events are described in Table 52.
11 to 10 Reserved.
9 Clock Select.
0 = core clock (default).
1 = low power (32.768 kHz) oscillator.
8 Count Up.
Set by user for Timer4 to count up.
Cleared by user for Timer4 to count down (default).
7 Timer4 Enable Bit.
Set by user to enable Timer0.
Cleared by user to disable Timer0 (default).
6 Timer4 Mode.
Set by user to operate in periodic mode.
Cleared by user to operate in free running mode. Default mode.
5 to 4 Reserved.
3 to 0 Prescaler.
0000 = source clock/1 (default).
0100 = source clock/16.
1000 = source clock/256.
1111 = source clock/32,768.