Datasheet

ADuC7033
Rev. B | Page 2 of 140
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications ..................................................................................... 4
Electrical Specifications ............................................................... 4
Timing Specifications ................................................................ 10
Absolute Maximum Ratings .......................................................... 15
ESD Caution ................................................................................ 15
Pin Configuration and Function Descriptions ........................... 16
Typical Performance Characteristics ........................................... 19
Terminology .................................................................................... 20
Theory of Operation ...................................................................... 21
Overview of the ARM7TDMI Core ......................................... 21
Memory Organization ............................................................... 23
Reset ............................................................................................. 25
Flash/EE Memory ........................................................................... 26
Programming Flash/EE Memory In-Circuit .......................... 26
Flash/EE Memory Control Interface ....................................... 26
Flash/EE Memory Security ....................................................... 30
Flash/EE Memory Reliability .................................................... 33
CODE Execution Time from SRAM and Flash/EE ............... 33
ADuC7033 Kernel ...................................................................... 34
Memory Mapped Registers ........................................................... 36
Complete MMR Listing ............................................................. 37
16-Bit, Σ-Δ Analog-to-Digital Converters .................................. 43
Current Channel ADC (I-ADC) .............................................. 43
Voltage/Temperature Channel ADC (V/T-ADC) ................. 45
ADC Ground Switch .................................................................. 46
ADC Noise Performance Tables ............................................... 47
ADC MMR Interface ................................................................. 48
ADC Power Modes of Operation ............................................. 59
ADC Diagnostics ........................................................................ 64
Power Supply Support Circuits ..................................................... 65
System Clocks ................................................................................. 66
Low Power Clock Calibration ................................................... 69
Processor Reference Peripherals ................................................... 72
Interrupt System ......................................................................... 72
Timers .............................................................................................. 74
Synchronization of Timers Across Asynchronous Clock
Domains ...................................................................................... 74
Programming the Timers .......................................................... 75
Timer0—Lifetime Timer ........................................................... 77
Timer1.......................................................................................... 80
Timer2 or Wake-Up Timer ....................................................... 82
Timer3 or Watchdog Timer ...................................................... 84
Timer4 or STI Timer .................................................................. 86
General-Purpose Input/Output .................................................... 88
High Voltage Peripheral Control Interface ................................. 99
Wake-Up (WU) Pin ................................................................. 106
Handling Interrupts from the High Voltage Peripheral
Control Interface ...................................................................... 107
Low Voltage Flag (LVF) ........................................................... 107
High Voltage Diagnostics ........................................................ 107
UART Serial Interface .................................................................. 108
Baud Rate Generation .............................................................. 108
UART Register Definition ....................................................... 108
Serial Peripheral Interface ........................................................... 114
MISO (Master In, Slave Out Data I/O Pin) .......................... 114
MOSI (Master Out, Slave In Pin) ........................................... 114
SCLK (Serial Clock I/O Pin) ................................................... 114
Chip Select (
SS
) Input Pin ....................................................... 114
SPI Register Definitions .......................................................... 114
Serial Test Interface ...................................................................... 117
LIN (Local Interconnect Network) Interface............................ 121
LIN MMR Description ............................................................ 121
LIN Hardware Interface .......................................................... 126
Bit Serial Device (BSD) Interface ............................................... 130
BSD Communication Hardware Interface ............................ 130
BSD Related MMRs ................................................................. 130
BSD Communications Frame ................................................. 131
BSD Data Reception................................................................. 132
BSD Data Transmission ........................................................... 132
Wake-Up from BSD Interface ................................................. 133
Part Identification ......................................................................... 134
Schematic ....................................................................................... 137
Outline Dimensions ..................................................................... 138
Ordering Guide ........................................................................ 138