Datasheet

ADuC7033
Rev. B | Page 116 of 140
SPI Status Register
Name: SPISTA
Address: 0xFFFF0A00
Default
Va lu e:
0x00
Access: Read only
Function: The 8-bit MMR represents the current status of the
serial peripheral interface.
Table 90. SPISTA MMR Bit Designations
Bit Description
7 to 6 Reserved.
5 SPIRX Data Register Overflow Status Bit.
Set if SPIRX is overflowing.
Cleared by reading the SPIRX register.
4 SPIRX Data Register IRQ.
Set automatically if Bit 3 or Bit 5 is set.
Cleared by reading the SPIRX register.
3 SPIRX Data Register Full Status Bit.
Set automatically if valid data is present in the SPIRX
register.
Cleared by reading the SPIRX register.
2 SPITX Data Register Underflow Status Bit.
Set automatically if SPITX is underflowing.
Cleared by writing in the SPITX register.
1 SPITX Data Register IRQ.
Set automatically if Bit 0 is clear or Bit 2 is set.
Cleared by either writing in the SPITX register or, if
finished transmission, by disabling the SPI.
0 SPITX Data Register Empty Status Bit.
Set by writing to SPITX to send data. This bit is set
during transmission of data.
Cleared when SPITX is empty.
SPI Receive Register
Name: SPIRX
Address: 0xFFFF0A04
Default
Va lu e:
0x00
Access: Read only
Function: This 8-bit MMR contains the data received using
the serial peripheral interface.
SPI Transmit Register
Name: SPITX
Address: 0xFFFF0A08
Access: Write only
Function: Write to this 8-bit MMR to transmit data using the
serial peripheral interface.
SPI Divider Register
Name: SPIDIV
Address: 0xFFFF0A0C
Default
Va lu e:
0x1B
Access: Read/write
Function: The 8-bit MMR represents the frequency at which
the serial peripheral interface is operating. For
more information on the calculation of the baud
rate, refer to Equation 1.