Datasheet

ADuC7033
Rev. B | Page 107 of 140
HANDLING INTERRUPTS FROM THE HIGH
VOLTAGE PERIPHERAL CONTROL INTERFACE
An interrupt controller is also integrated with the high voltage
circuits. If enabled through IRQEN[16], one of six high voltage
sources can assert the high voltage interrupt (IRQ3) signal and
interrupt the MCU core.
Although the normal MCU response to this interrupt event
is to vector to the IRQ or FIQ interrupt vector address, the
high voltage interrupt controller simultaneously and automat-
ically loads the current value of the high voltage status register
(HVSTA) into the HVDAT register. During this time, the busy
bit, HVCON[0], is set to indicate that the transfer is in progress
and clears after 10 µs to indicate the HVSTA contents are
available in HVDAT.
The interrupt handler can, therefore, poll the busy bit in
HVCON until it deasserts. When the busy bit is cleared,
HVCON[1] must be checked to ensure the data was read
correctly. Then the HVDAT register can be read. At this time,
HVDAT holds the value of the HVSTA register. The status flags
can then be interrogated to determine the exact source of the
high voltage interrupt and the appropriate action can be taken.
LOW VOLTAGE FLAG (LVF)
The ADuC7033 features a low voltage flag (LVF) that, when
enabled, allows the user to monitor REG_DVDD. When enabled
via HVCFG0[2], the low voltage flag can be monitored through
HVMON[3]. If REG_DVDD drops below 2.1 V, HVMON[3] is
cleared. If REG_DVDD drops below 2.1 V, the RAM contents are
corrupted. After the low voltage flag is enabled, it is only reset
by REG_DVDD dropping below 2.1 V or by disabling the LVF
functionality using HVCFG0[2].
HIGH VOLTAGE DIAGNOSTICS
It is possible to diagnosis fault conditions on the wake, LIN, and
STI bus as listed in Table 78.
Table 78. High Voltage Diagnostics
High
Voltage Pin Fault Condition Method Result
LIN/STI
Short between LIN/STI
and VBAT
Drive LIN low
LIN/STI short-circuit interrupt is generated after 20 µs if
more than 100 mA is continuously drawn.
Short between LIN/STI
and GND
Drive LIN high LIN/STI readback reads back low.
WU
Short between WU
and VBAT
Drive WU low Readback high in HVMON[7].
Short between WU
and GND
Drive WU high
WU short-circuit interrupt is generated after 400 s if more
than 100 mA typically is sourced.
Open circuit
Enable OC diagnostic resistor
with wake up disabled
HVMON[7] is cleared if the load is connected and set if WU is
open-circuited.