Datasheet

ADuC7033
Rev. B | Page 106 of 140
WAKE-UP (WU) PIN
The wake-up (WU) pin is a high voltage GPIO controlled
through HVCON and HVDAT.
WU Pin Circuit Description
The WU pin is configured by default as an output with an
internal 10 kΩ pull-down resistor and high-side FET driver.
The WU pin, in its default mode of operation, is specified to
generate an active high system wake-up request by forcing the
external system WU bus high. User code can assert the WU
output by writing directly to HVCFG0[4].
Note that the output responds only after the 10 µs latency
through the (serial communication based) high voltage
interface.
The internal FET is capable of sourcing significant current and,
therefore, substantial on-chip self-heating can occur if this
driver is asserted for a long time period. For this reason, a
monoflop (a 1.3-second timeout timer) is included.
By default, the monoflop is enabled and disables the wake-up
driver after 1.3 seconds. It is possible to disable the monoflop
through HVCFG1[1]. If the wake-up monoflop is disabled, then
the wake-up driver should be disabled after 1.3 seconds.
The WU pin also features a short-circuit detection feature.
When the wake-up pin sources more than 100 mA typically for
400 µs, a high voltage interrupt is generated with HVMON[0] set.
A thermal shutdown event disables the WU driver. The WU
driver must be re-enabled manually after a thermal event using
HVCFG1[3]. It is possible to disable the automatic shutdown
during a thermal event via HVCFG0[7].
The WU pin can be configured in I/O mode by writing a 1 to
HVCFG1[4]. In this mode, a rising or falling edge immediately
generates a high voltage interrupt. HVMON[7] directly reflects
the state of the external WU pin. This comparator has a trip
level of 3 V
TYP
.
V
DD
INTERNAL
SENSE
RESISTOR
SHORT-CIRCUIT
TRIP REFERENCE
SHORT-CIRCUIT
PROTECTION
OUTPUT CONTROL
HVMON[0]
NORMAL
HVCFG0[4]
NORMAL
HVMON[7]
400µs
GLITCH
IMMUNITY
3V
ENABLE
READBACK
HVCFG1[4]
INTERNAL
10kΩ
RESISTOR
R1
6.6kΩ
R2
3.3kΩ
IO_VSS
6kΩ
O/C
DIAGNOSTIC
RESISTOR
EXTERNAL
WU PIN
EXTERNAL
WAKE BUS
C
LOAD
91nF
R
LOAD
1kΩ
EXTERNAL
CURRENT-LIMIT
RESISTOR
39Ω
HVCFG1[0]
06847-037
Figure 41. WU Circuit, Block Diagram