Datasheet

Data Sheet ADuC7019/20/21/22/24/25/26/27/28/29
Rev. F | Page 69 of 104
Table 83. GPIO Drive Strength Control Bits Descriptions
Control Bits Value Description
00 Medium drive strength.
01 Low drive strength.
1x High drive strength.
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
–24 –18 –12 –6 0 6 12 18 24
LOAD CURRENT (mA)
VOLTAGE ON EACH PIN (V)
HIGH DRIVE STRENGTH
MEDIUM DRIVE STRENGTH
LOW DRIVE STRENGTH
04955-031
Figure 73. Programmable Strength for High Level
(Typical Values)
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–24
–18 –12
–6 0
6 12 18
24
LOAD CURRENT (mA)
VOLTAGE ON EACH PIN (V)
HIGH DRIVE STRENGTH
MEDIUM DRIVE STRENGTH
LOW DRIVE STRENGTH
04955-032
Figure 74. Programmable Strength for Low Level
(Typical Values)
The drive strength bits can be written to one time only after
reset. More writing to related bits has no effect on changing
drive strength. The GPIO drive strength and pull-up disable is
not always adjustable for the GPIO port. Some control bits
cannot be changed (see Table 84).
Table 84. GPxPAR Control Bits Access Descriptions
Bit GP0PAR GP1PAR
31 Reserved Reserved
30 to 29 R/W R/W
28 R/W R/W
27 Reserved Reserved
26 to 25 R/W R/W
24 R/W R/W
23 Reserved Reserved
22 to 21 R/W R (b00)
20 R/W R/W
19 Reserved Reserved
18 to 17 R (b00) R (b00)
16 R/W R/W
15 Reserved Reserved
14 to 13 R (b00) R (b00)
12 R/W R/W
11
Reserved
Reserved
10 to 9 R (b00) R (b00)
8 R/W R/W
7 Reserved Reserved
6 to 5 R (b00) R (b00)
4
R/W
R/W
3 Reserved Reserved
2 to 1 R (b00) R (b00)
0 R/W R/W