Datasheet

ADT7470 Data Sheet
Rev. E | Page 30 of 40
Table 27. Register 0x38 to Register 0x3B. PWM Max Duty Cycle Registers (Power-On Default = 0xFF).
Register Address Read/Write Description
0x38 Read/Write PWM1 max duty cycle: PWM1 Min duty cycle value (register 0x6A) to 100% duty cycle.
0x39 Read/Write PWM2 max duty cycle: PWM2 Min duty cycle value (register 0x6B) to 100% duty cycle.
0x3A Read/Write PWM3 max duty cycle: PWM3 Min duty cycle value (register 0x6C) to 100% duty cycle.
0x3B Read/Write PWM4 max duty cycle: PWM4 Min duty cycle value (register 0x6D) to 100% duty cycle.
Table 28. Register 0x3D. Device ID Register (Power-On Default = 0x70).
Register Address Read/Write Description
0x3D Read only Device ID.
The device ID register contains the ADT7470 device ID value as a means of identifying the part over the bus.
Table 29. Register 0x3E. Company ID Register (Power-On Default = 0x41).
Register Address Read/Write Description
0x3E Read only Company ID.
The company ID register contains 0x41, the manufacturer ID number representative of the Analog Devices, Inc. product.
Table 30. Register 0x3F. Revision Register (Power-On Default = 0x02).
Register Address Read/Write Description
0x3F Read only Revision Register.
The revision register contains the revision number of the ADT7470.
Table 31. Register 0x40. Configuration Register 1 (Power-On Default = 0x01).
Bit Name Read/Write Description
[0] STRT Read/Write Logic 1 enables monitoring and PWM control outputs based on the limit settings
programmed.
Logic 0 disables monitoring and PWM control based on the default power-up limit settings.
The limit values programmed are preserved even if a Logic 0 is written to this bit and the
default settings are enabled.
[1] Reserved Read/Write Reserved. Write 0 to this bit.
[2] Reserved Read/Write Reserved. Write 0 to this bit.
[3] TODIS Read/Write Writing a 1 disables SMBus timeout.
[4] LOCK Write Once Once this bit is set, all lockable registers become read-only and cannot be modified until the
ADT7470 is powered down and powered up again.
[5] FST_TCH Read/Write Enable Fast Tach measurement.
0 = Tach measurement rate is 1 measurement per second
1= Tach measurement rate is 1 measurement every 250ms
[6] HF_LF Read/Write This bit switches between high frequency and low frequency fan drive.
0 (default) = high frequency fan drive (1.4 kHz or 22.5 kHz. See Configuration Register 2,
Register 0x74, Bits [6:4]) in Table 44.
1 = low frequency fandrive (frequency determined by Configuration Register 2, Register 0x74,
Bits[6:4]) in Table 44.
[7] T05_STB Read/Write Select configuration for Pin 13.
0 (default) =
FULL SPEED
input.
1 = TMP05 start pulse output.