Datasheet
Data Sheet ADT7470
Rev. E | Page 23 of 40
FAN SPEED MEASUREMENT
The fan counter does not count the fan tach output pulses
directly, because the fan speed may be less than 1000 RPM, and
it would take several seconds to accumulate a reasonably large
and accurate count. Instead, the period of the fan revolution is
measured by gating an on-chip 90 kHz oscillator into the input
of a 16-bit counter for N periods of the fan tach output, as shown
in Figure 24, so the accumulated count is actually proportional
to the fan tachometer period and inversely proportional to the
fan speed.
N, the number of pulses counted, is determined by the settings
of Register 0x43 (fan pulses per revolution register). This register
contains two bits for each fan, allowing 1, 2 (default), 3, or 4
tach pulses to be counted.
C
LOCK
PWM
TACH
1
2
3
4
04684-0-029
Figure 24. Fan Speed Measurement
Fan Speed Measurement Registers
The fan tachometer readings are 16-bit values consisting of
a 2-byte read from the ADT7470.
Table 19. Fan Speed Measurement Registers
Register Address Description Default
0x2A Tach 1 low byte 0x00
0x2B Tach 1 high byte 0x00
0x2C Tach 2 low byte 0x00
0x2D Tach 2 high byte 0x00
0x2E Tach 3 low byte 0x00
0x2F Tach 3 high byte 0x00
0x30 Tach 4 low byte 0x00
0x31 Tach 4 high byte 0x00
Reading Fan Speed from the ADT7470
Measuring fan speed involves a 2-register read for each meas-
urement. The low byte should be read first. This causes the
high byte to be frozen until both high and low byte registers
are read from, preventing erroneous tach readings.
The fan tachometer reading registers report back the number
of 11.11 ms period clocks (90 kHz oscillator) gated to the fan
speed counter, from the rising edge of the first fan tach pulse
to the rising edge of the third fan tach pulse (assuming 2 pulses
per revolution are being counted). Since the device is essentially
measuring the fan tach period, the higher the count value,
the slower the fan is actually running. A 16-bit fan tachometer
reading of 0xFFFF indicates either that the fan has stalled or
is running very slowly (<100 RPM).
Fan Tach Limit Registers
The fan tach limit registers are 16-bit values consisting of two
bytes. Minimum limits determine fan under speed settings,
while maximum limits determine fan over speed settings.
Table 20. Fan Tach Limit Registers
Register Address Description Default
0x58 Tach 1 min low byte 0xFF
0x59 Tach 1 min high byte 0xFF
0x5A Tach 2 min low byte 0xFF
0x5B Tach 2 min high byte 0xFF
0x5C Tach 3 min low byte 0xFF
0x5D Tach 3 min high byte 0xFF
0x5E Tach 4 min low byte 0xFF
0x5F Tach 4 min high byte 0xFF
0x60 Tach 1 max low byte 0x00
0x61 Tach 1 max high byte 0x00
0x62 Tach 2 max low byte 0x00
0x63 Tach 2 max high byte 0x00
0x64 Tach 3 max low byte 0x00
0x65 Tach 3 max high byte 0x00
0x66 Tach 4 max low byte 0x00
0x67 Tach 4 max high byte 0x00
High Limit: Comparison
Because the actual fan tach period is being measured, exceeding
a fan tach limit by 1 sets the appropriate status bit and can be
used to generate an SMBALERT.
Fan Speed Measurement Rate
The fan tach readings are updated once every second by default.
The fast tach bit (Register 0x40 Bit[5]) controls the frequency
of tach measurements. Setting this bit to 1 increases the tach
measurements from one per second, to one every 250 ms.