Datasheet

ADT7470 Data Sheet
Rev. E | Page 18 of 40
SMBALERT INTERRUPT
The ADT7470 can be polled for status, or an
SMBALERT
interrupt can be generated for out-of-limit conditions. Note
how the
SMBALERT
output and status bits behave when
writing interrupt handler software.
Figure 15 shows how the
SMBALERT
output and sticky status
bits behave. Once a limit is exceeded, the corresponding status
bit is set to 1. The status bit remains set until the error condition
subsides the status register is read. The status bits are referred
to as sticky because they remain set until read by software. This
ensures that an out-of-limit event cannot be missed if software
is polling the device periodically. The
SMBALERT
output
remains low for the duration that a reading is out of limit until
the status register is read. This has implications for how
software handles the interrupt.
Handling
SMBALERT
Interrupts
To prevent the system from being tied up servicing interrupts,
handle the
SMBALERT
interrupt as follows:
1. Detect the
SMBALERT
assertion.
2. Enter the interrupt handler.
3. Read the status registers to identify the interrupt source.
4. Mask the interrupt source by setting the appropriate mask
bit in the interrupt mask registers (Register 0x72 and
Register 0x73).
5. Take the appropriate action for a given interrupt source.
6. Exit the interrupt handler.
7. Periodically poll the status registers. If the interrupt status
bit is cleared, reset the corresponding interrupt mask bit
to 0. This causes the
SMBALERT
output and status bits
to behave as shown in Figure 16.
"STICKY"
STATUS
BIT
HIGH LIMIT
T
EMPERATUR
E
SMBALERT
CLEARED ON READ
(TEMP BELOW LIMIT)
TEMP BACK IN LIMIT
(STATUS BIT STAYS SET)
04684-0-020
Figure 15.
SMBALERT
and Status Bit Behavior
"STICKY"
STATUS
BIT
HIGH LIMIT
TEMPERATURE
SMBALERT
CLEARED ON READ
(TEMP BELOW LIMIT)
TEMP BACK IN LIMIT
(STATUS BIT STAYS SET)
INTERRUPT
MASK BIT SET
INTERRUPT MASK BIT
CLEARED
(SMBALERT RE-ENABLED)
04684-0-021
Figure 16. How Masking the Interrupt Source Affects
SMBALERT
Output