Datasheet

Data Sheet ADT7320
Rev. 0 | Page 13 of 24
REGISTERS
The ADT7320 contains eight registers:
• A status register
• A configuration register
• Five temperature registers
• An ID register
The status register, temperature value register, and the ID
register are read only.
Table 6. ADT7320 Registers
Register Address Description Power-On Default
0x00 Status 0x80
0x01 Configuration 0x00
0x02 Temperature value 0x0000
0x03 ID 0xC3
0x04 T
CRIT
setpoint 0x4980 (147°C)
0x05 T
HYST
setpoint 0x05 (5°C)
0x06 T
HIGH
setpoint 0x2000 (64°C)
0x07 T
LOW
setpoint 0x0500 (10°C)
STATUS REGISTER
This 8-bit read-only register (Register Address 0x00) reflects the
status of the overtemperature and undertemperature interrupts
that can cause the CT and INT pins to become active. It also
reflects the status of a temperature conversion operation. The
interrupt flags in this register are reset by a read operation to
the status register and/or when the temperature value returns
within the temperature limits including hysteresis. The
RDY
bit is
reset after a read from the temperature value register. In one-
shot and 1 SPS modes, the
RDY
bit is reset after a write to the
operation mode bits in the configuration register.
Table 7. Status Register (Register Address 0x00)
Bit(s)
Default
Value Type Name Description
[3:0] 0000 R Unused Reads back 0.
[4] 0 R T
LOW
This bit is set to 1 when the temperature goes below the T
LOW
temperature limit. The bit is cleared to
0 when the status register is read and/or when the temperature measured rises above the limit set
in the T
LOW
+ T
HYST
setpoint registers.
[5] 0 R T
HIGH
This bit is set to 1 when the temperature rises above the T
HIGH
temperature limit. This bit is cleared
to 0 when the status register is read and/or when the temperature measured drops below the limit
set in the T
HIGH
− T
HYST
setpoint registers.
[6] 0 R T
CRIT
This bit is set to 1 when the temperature rises above the T
CRIT
temperature limit. This bit is cleared to
0 when the status register is read and/or when the temperature measured drops below the limit set
in the T
CRIT
− T
HYST
setpoint registers.
[7] 1 R
RDY
This bit goes low when the temperature conversion result is written to the temperature value
register. It is reset to 1 when the temperature value register is read. In one-shot and 1 SPS modes,
this bit is reset after a write to the operation mode bits in the configuration register.