Datasheet

ADT7316/ADT7317/ADT7318
Rev. B | Page 26 of 44
INTERRUPTS
The measured results from the internal temperature sensor,
external temperature sensor, and the V
DD
pin are compared with
the T
HIGH
/V
HIGH
(greater than comparison) and T
LOW
/V
LOW
(less
than or equal to comparison) limits. An interrupt occurs if the
measurement exceeds or equals the limit registers. These limits
are stored in on-chip registers. Note that the limit registers are
8 bits long, while the conversion results are 10 bits long. If the
limits are not masked out, then any out-of-limit comparisons
generate flags that are stored in the Interrupt Status 1 register
(Address 0x00) and the Interrupt Status 2 register (Address
0x01). One or more out-of-limit results cause the INT/
INT
output
to pull either high or low depending on the output polarity
setting. It is good design practice to mask out interrupts for
channels that are of no concern to the application.
Figure 45 shows the interrupt structure for the ADT7316/
ADT7317/AD
T7318. It shows a block diagram of how the
various measurement channels affect the INT/
INT
pin.
CONTROL
CONFIGURATION
REGISTER 1
INTERRUPT
MASK
REGISTERS
STATUS BITS
INTERRUPT
STATUS
REGISTER 1
(TEMP AND EXT.
DIODE CHECK)
WATCHDOG
LIMIT
COMPARISONS
EXTERNAL
TEMP
V
DD
DIODE
FAULT
INT/INT
ENABLE BIT
INT/INT
(LATCHED OUTPUT)
STATUS BIT
INTERRUPT
STATUS
REGISTER 2
(V
DD
)
INTERNAL
TEMP
S/W RESET
READ RESET
0
2661-044
Figure 45. ADT7316/ADT7317/ADT7318 Interrupt Structure