Datasheet

Rev. D | Page 22 of 48 | May 2012
ADSP-TS203S
PACKAGE INFORMATION
The information presented in Figure 6 provide details about the
package branding for the ADSP-TS203S processors. For a com-
plete listing of product availability, see Ordering Guide on
Page 47.
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed in Table 20 may cause perma-
nent damage to the device. These are stress ratings only.
Functional operation of the device at these or any other condi-
tions greater than those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device
reliability.
ESD SENSITIVITY
Figure 6. Typical Package Brand
Table 19. Package Brand Information
Brand Key Field Description
t Temperature Range
pp Package Type
Z Lead Free Option (optional)
ccc See Ordering Guide
tppzccc Silicon Lot Number
2.0 Silicon Revision
yyww Date Code
vvvvvv Assembly Lot Code
tppzccc 2.0
T
ADSP-TS203S
a
#yyww country_of_origin
BBPZ050
vvvvvv
Table 20. Absolute Maximum Ratings
Parameter Rating
Internal (Core) Supply Voltage (V
DD
)–0.3 V to +1.4 V
Analog (PLL) Supply Voltage (V
DD_A
)–0.3 V to +1.4 V
External (I/O) Supply Voltage (V
DD_IO
)–0.3 V to +3.5 V
External (DRAM) Supply Voltage
(V
DD_DRAM
)–0.3 V to +2.1 V
Input Voltage
1
1
Applies to 10% transient duty cycle. For other duty cycles see Table 18.
–0.63 V to +3.93 V
Output Voltage Swing –0.5 V to V
DD_IO
+0.5 V
Storage Temperature Range –65°C to +150°C
ESD
(electrostatic discharge) sensitive device.
Charged devices and circuit boards can discharge
without detection. Although this product features
patented or proprietary protection circuitry, damage
may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to
avoid
performance degradation or loss of functionality.