Datasheet

ADSP-TS202S
Rev. C | Page 15 of 48 | December 2006
Table 7. Pin Definitions—External Port DMA/Flyby
Signal Type Term Description
DMAR3–0
I/A epu DMA Request Pins. Enable external I/O devices to request DMA services from the DSP.
In response to DMARx, the DSP performs DMA transfers according to the DMA
channel’s initialization. The DSP ignores DMA requests from uninitialized channels.
IOWR
O/T
(pu_0)
nc I/O Write. When a DSP DMA channel initiates a flyby mode read transaction, the DSP
asserts the IOWR
signal during the data cycles. This assertion makes the I/O device
sample the data instead of the TigerSHARC.
IORD
O/T
(pu_0)
nc I/O Read. When a DSP DMA channel initiates a flyby mode write transaction, the DSP
asserts the IORD signal during the data cycle. This assertion with the IOEN makes the
I/O device drive the data instead of the TigerSHARC.
IOEN
O/T
(pu_0)
nc I/O Device Output Enable. Enables the output buffers of an external I/O device for fly-
by transactions between the device and external memory. Active on flyby
transactions.
I = input; A = asynchronous; O = output; OD = open-drain output; T = three-state; P = power supply; G = ground; pd = internal pull-down
5kΩ; pu = internal pull-up 5 kΩ; pd_0 = internal pull-down 5 kΩ on DSP ID = 0; pu_0 = internal pull-up 5 kΩ on DSP ID = 0; pu_od_0 = internal
pull-up 500
Ω on DSP ID = 0; pd_m = internal pull-down 5 kΩ on DSP bus master; pu_m = internal pull-up 5 kΩ on DSP bus master; pu_ad
= internal pull-up 40 kΩ. For more pull-down and pull-up information, see Electrical Characteristics on Page 22.
Term (termination of unused pins) column symbols: epd = external pull-down approximately 5 k
Ω to V
SS
; epu = external pull-up approx-
imately 5 k
Ω to V
DD_IO
, nc = not connected; na = not applicable (always used); V
DD_IO
= connect directly to V
DD_IO
; V
SS
= connect directly to V
SS
Table 8. Pin Definitions—External Port SDRAM Controller
Signal Type Term Description
MSSD3–0
I/O/T
(pu_0)
nc Memory Select SDRAM. MSSD0, MSSD1, MSSD2, or MSSD3 is asserted whenever the
DSP accesses SDRAM memory space. MSSD3–0 are decoded memory address pins
that are asserted whenever the DSP issues an SDRAM command cycle (access to
ADDR31:30 = 0b01—except reserved spaces shown in Figure 3 on Page 6). In a multi-
processor system, the master DSP drives MSSD3–0
.
RAS
I/O/T
(pu_0)
nc Row Address Select. When sampled low, RAS indicates that a row address is valid in
a read or write of SDRAM. In other SDRAM accesses, it defines the type of operation
to execute according to SDRAM specification.
CAS I/O/T
(pu_0)
nc Column Address Select. When sampled low, CAS indicates that a column address is
valid in a read or write of SDRAM. In other SDRAM accesses, it defines the type of
operation to execute according to the SDRAM specification.
LDQM O/T
(pu_0)
nc Low Word SDRAM Data Mask. When sampled high, three-states the SDRAM DQ
buffers. LDQM is valid on SDRAM transactions when CAS
is asserted, and inactive on
read transactions. On write transactions, LDQM is active when accessing an odd
address word on a 64-bit memory bus to disable the write of the low word.
HDQM O/T
(pu_0)
nc High Word SDRAM Data Mask. When sampled high, three-states the SDRAM DQ
buffers. HDQM is valid on SDRAM transactions when CAS is asserted, and inactive on
read transactions. On write transactions, HDQM is active when accessing an even
address in word accesses or when memory is configured for a 32-bit bus to disable
the write of the high word.
I = input; A = asynchronous; O = output; OD = open-drain output; T = three-state; P = power supply; G = ground; pd = internal pull-down
5k
Ω; pu = internal pull-up 5 kΩ; pd_0 = internal pull-down 5 kΩ on DSP ID = 0; pu_0 = internal pull-up 5 kΩ on DSP ID = 0; pu_od_0 = internal
pull-up 500
Ω on DSP ID = 0; pd_m = internal pull-down 5 kΩ on DSP bus master; pu_m = internal pull-up 5 kΩ on DSP bus master; pu_ad
= internal pull-up 40 k
Ω. For more pull-down and pull-up information, see Electrical Characteristics on Page 22.
Term (termination of unused pins) column symbols: epd = external pull-down approximately 5 k
Ω to V
SS
; epu = external pull-up approx-
imately 5 k
Ω to V
DD_IO
, nc = not connected; na = not applicable (always used); V
DD_IO
= connect directly to V
DD_IO
; V
SS
= connect directly to V
SS