Datasheet

ADSP-TS101S
Rev. C | Page 45 of 48 | May 2009
ORDERING GUIDE
Part Number
1, 2, 3, 4
1
S indicates 1.2 V and 3.3 V supplies.
2
A indicates –40°C to +85°C temperature.
3
000 indicates 250 MHz speed grade; 100 indicates 300 MHz speed grade.
4
Z indicates RoHS compliant part.
Temperature Range
(Case)
Core Clock
(CCLK) Rate
5
5
The instruction rate runs at the internal DSP clock (CCLK) rate.
On-Chip
SRAM Package Description
Package
Option
ADSP-TS101SAB1-000 –40°C to +85°C 250 MHz 6M Bit 625-Ball Plastic Ball Grid Array (PBGA) B-625
6
6
The B-625 package measures 27 mm  27 mm.
ADSP-TS101SAB1-100 –40°C to +85°C 300 MHz 6M Bit 625-Ball Plastic Ball Grid Array (PBGA) B-625
6
ADSP-TS101SAB1Z000 –40°C to +85°C 250 MHz 6M Bit 625-Ball Plastic Ball Grid Array (PBGA) B-625
6
ADSP-TS101SAB1Z100 –40°C to +85°C 300 MHz 6M Bit 625-Ball Plastic Ball Grid Array (PBGA) B-625
6
ADSP-TS101SAB2-000 –40°C to +85°C 250 MHz 6M Bit 484-Ball Plastic Ball Grid Array (PBGA) B-484
7
7
The B-484 package measures 19 mm  19 mm.
ADSP-TS101SAB2-100 –40°C to +85°C 300 MHz 6M Bit 484-Ball Plastic Ball Grid Array (PBGA) B-484
7
ADSP-TS101SAB2Z000 –40°C to +85°C 250 MHz 6M Bit 484-Ball Plastic Ball Grid Array (PBGA) B-484
7
ADSP-TS101SAB2Z100 –40°C to +85°C 300 MHz 6M Bit 484-Ball Plastic Ball Grid Array (PBGA) B-484
7