Datasheet

Rev. C | Page 20 of 48 | May 2009
ADSP-TS101S
SPECIFICATIONS
Note that component specifications are subject to change with-
out notice.
OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS
Parameter Test Conditions Min Typ Max Unit
V
DD
Internal Supply Voltage 1.14 1.26 V
V
DD_A
Analog Supply Voltage 1.14 1.26 V
V
DD_IO
I/O Supply Voltage 3.15 3.45 V
T
CASE
Case Operating Temperature –40 +85 ºC
V
IH
High Level Input Voltage
1
1
Applies to input and bidirectional pins.
@ V
DD
, V
DD_IO
= max 2 V
DD_IO
+ 0.5 V
V
IL
Low Level Input Voltage
1
@ V
DD
, V
DD_IO
= min –0.5 +0.8 V
I
DD
V
DD
Supply Current for Typical Activity
2
2
For details on internal and external power estimation, including: power vector definitions, current usage descriptions, and formulas, see EE-169, Estimating Power for the
ADSP-TS101S on the Analog Devices website—use site search on “EE-169” (www.analog.com). This document is updated regularly to keep pace with silicon revisions.
@ CCLK = 250 MHz, V
DD
=1.25 V,
T
CASE
=25ºC
1.2 A
I
DD
V
DD
Supply Current for Typical Activity
2
@ CCLK = 300 MHz, V
DD
=1.25 V,
T
CASE
=25ºC
1.5 A
I
DDIDLELP
V
DD
Supply Current for IDLELP
Instruction Execution
@ CCLK = 300 MHz, V
DD
=1.20 V,
T
CASE
=25ºC
173 mA
I
DD_IO
V
DD_IO
Supply Current for Typical
Activity
2
@ SCLK = 100 MHz, V
DD_IO
=3.3V,
T
CASE
=25ºC
137 mA
I
DD_A
V
DD_A
Supply Current @ V
DD
=1.25 V, T
CASE
= 25ºC 25 31.25 mA
V
REF
Voltage Reference 1.4 1.6 V
Parameter Test Conditions Min Max Unit
V
OH
High Level Output Voltage
1
1
Applies to output and bidirectional pins.
@V
DD_IO
= min, I
OH
= –2 mA 2.4 V
V
OL
Low Level Output Voltage
1
@V
DD_IO
= min, I
OL
=4 mA 0.4 V
I
IH
High Level Input Current
2
2
Applies to input pins with internal pull-downs (pd).
@V
DD_IO
=max, V
IN
=V
DD_IO
max 10 μA
I
IHP
High Level Input Current (pd)
2
@V
DD_IO
=max, V
IN
=V
DD_IO
max 17.2 44.5 μA
I
IL
Low Level Input Current
3
3
Applies to input pins without internal pull-ups (pu).
@V
DD_IO
=max, V
IN
=0V 10 μA
I
ILP
Low Level Input Current (pu)
4
4
Applies to input pins with internal pull-ups (pu).
@V
DD_IO
=max, V
IN
=0V –69 –23 μA
I
OZH
Three-State Leakage Current High
5, 6
5
Applies to three-stateable pins without internal pull-downs (pd).
6
Applies to open drain (od) pins with 500  pull-ups (pu).
@V
DD_IO
=max, V
IN
=V
DD_IO
max 10 μA
I
OZHP
Three-State Leakage Current High (pd)
7
7
Applies to three-stateable pins with internal pull-downs (pd).
@V
DD_IO
=max, V
IN
=V
DD_IO
max 17.2 44.5 μA
I
OZL
Three-State Leakage Current Low
8
8
Applies to three-stateable pins without internal pull-ups (pu).
@V
DD_IO
=max, V
IN
=0V 10 μA
I
OZLP
Three-State Leakage Current Low (pu)
9
9
Applies to three-stateable pins with internal pull-ups (pu).
@V
DD_IO
=max, V
IN
=0V –69 –23 μA
I
OZLO
Three-State Leakage Current Low (od)
7
@V
DD_IO
=max, V
IN
= 0 V –9.8 –4.6 mA
C
IN
Input Capacitance
10, 11
10
Applies to all signals.
11
Guaranteed but not tested.
@f
IN
=1MHz, T
CASE
= 25ºC, V
IN
=2.5V 5 pF