Datasheet
Table Of Contents
- Blackfin Dual Core Embedded Processor
- Features
- Memory
- Table Of Contents
- Revision History
- General Description
- ADSP-BF60x Detailed Signal Descriptions
- 349-Ball CSP_BGA Signal Descriptions
- GP I/O Multiplexing for 349-Ball CSP_BGA
- ADSP-BF60x Designer Quick Reference
- Specifications
- Operating Conditions
- Electrical Characteristics
- Processor — Absolute Maximum Ratings
- ESD Sensitivity
- Processor — Package Information
- Timing Specifications
- Clock and Reset Timing
- Power-Up Reset Timing
- Asynchronous Read
- Asynchronous Flash Read
- Asynchronous Page Mode Read
- Synchronous Burst Flash Read
- Asynchronous Write
- Asynchronous Flash Write
- All Accesses
- Bus Request/Bus Grant
- DDR2 SDRAM Clock and Control Cycle Timing
- DDR2 SDRAM Read Cycle Timing
- DDR2 SDRAM Write Cycle Timing
- Mobile DDR SDRAM Clock and Control Cycle Timing
- Mobile DDR SDRAM Read Cycle Timing
- Mobile DDR SDRAM Write Cycle Timing
- Enhanced Parallel Peripheral Interface Timing
- Link Ports
- Serial Ports
- Serial Peripheral Interface (SPI) Port—Master Timing
- Serial Peripheral Interface (SPI) Port—Slave Timing
- Serial Peripheral Interface (SPI) Port—SPI_RDY Slave Timing
- Serial Peripheral Interface (SPI) Port—Open Drain Mode Timing
- Serial Peripheral Interface (SPI) Port—SPI_RDY Timing
- General-Purpose Port Timing
- Timer Cycle Timing
- Up/Down Counter/Rotary Encoder Timing
- Pulse Width Modulator (PWM) Timing
- ADC Controller Module (ACM) Timing
- Universal Asynchronous Receiver-Transmitter (UART) Ports—Receive and Transmit Timing
- CAN Interface
- Universal Serial Bus (USB) On-The-Go—Receive and Transmit Timing
- RSI Controller Timing
- 10/100 Ethernet MAC Controller Timing
- JTAG Test And Emulation Port Timing
- Output Drive Currents
- Environmental Conditions
- ADSP-BF60x 349-Ball CSP_BGA Ball Assignments
- Outline Dimensions
- Automotive Products
- Ordering Guide
Rev. 0 | Page 99 of 112 | June 2013
ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609
OUTPUT DRIVE CURRENTS
Figure 54 through Figure 59 show typical current-voltage char-
acteristics for the output drivers of the ADSP-BF60x Blackfin
processors. The curves represent the current drive capability of
the output drivers as a function of output voltage.
Figure 54. Driver Type A Current (1.8 V V
DD_EXT
)
Figure 55. Driver Type A Current (3.3 V V
DD_EXT
)
0
SOURCE CURRENT (mA)
SOURCE VOLTAGE (V)
0 0.5 1.0 1.5 2.0
40
– 20
V
OL
V
OH
V
DD_EXT
= 1.9V @ – 40
°
C
V
DD_EXT
= 1.8V @ 25
°
C
– 40
20
V
DD_EXT
= 1.7V @ 125
°
C
0
SOURCE CURRENT (mA)
SOURCE VOLTAGE (V)
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
60
40
– 60
– 20
V
OL
V
OH
4.0
V
DD_EXT
= 3.465V @ – 40
°
C
V
DD_EXT
= 3.30V @ 25
°
C
– 40
– 80
20
80
V
DD_EXT
= 3.135V @ 105
°
C
Figure 56. Driver Type B Current (1.8 V V
DD_DMC
)
Figure 57. Driver Type C Current (1.8 V V
DD_DMC
)
0
SOURCE CURRENT (mA)
SOURCE VOLTAGE (V)
0 0.5 1.0 1.5 2.0
100
60
40
– 60
– 20
V
OL
V
OH
V
DD_DMC
= 1.9V @ – 40
°
C
V
DD_DMC
= 1.8V @ 25
°
C
– 40
– 80
20
80
V
DD_DMC
= 1.7V @ 125
°
C
0
SOURCE CURRENT (mA)
SOURCE VOLTAGE (V)
0 0.5 1.0 1.5 2.0
100
60
40
– 60
– 20
V
OL
V
OH
– 40
– 80
20
80
V
DD_DMC
= 1.9V @ – 40
°
C
V
DD_DMC
= 1.8V @ 25
°
C
V
DD_DMC
= 1.7V @ 125
°
C