Datasheet

Rev. 0 | Page 54 of 112 | June 2013
ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609
ELECTRICAL CHARACTERISTICS
Parameter Test Conditions Min Typical Max Unit
V
OH
1
High Level Output Voltage V
DD_EXT
= 1 . 7 V, I
OH
= –0.5 mA V
DD_EXT
– 0.40 V
V
OH
1
High Level Output Voltage V
DD_EXT
= 3 . 1 3 V , I
OH
= –0.5 mA V
DD_EXT
– 0.40 V
V
OH_DDR2
2
High Level Output Voltage, ds = 00 V
DD_DMC
= 1.70 V, I
OH
= –13.4 mA 1.388 V
V
OH_DDR2
3
High Level Output Voltage, ds = 10 V
DD_DMC
= 1.70 V, I
OH
= –6.70 mA 1.311 V
V
OH_LPDDR
4
High Level Output Voltage, ds = 00 V
DD_DMC
= 1.70 V, I
OH
= –11.2 mA 1.300 V
V
OH_LPDDR
5
High Level Output Voltage, ds = 01 V
DD_DMC
= 1.70 V, I
OH
= –7.85 mA 1.300 V
V
OH_LPDDR
6
High Level Output Voltage, ds = 10 V
DD_DMC
= 1.70 V, I
OH
= –5.10 mA 1.300 V
V
OH_LPDDR
7
High Level Output Voltage, ds = 11 V
DD_DMC
= 1.70 V, I
OH
= –2.55 mA 1.300 V
V
OL
8
Low Level Output Voltage V
DD_EXT
= 1 . 7 V, I
OL
= 2.0 mA 0.400 V
V
OL
8
Low Level Output Voltage V
DD_EXT
= 3.13 V, I
OL
= 2.0 mA 0.400 V
V
OL_DDR2
2
Low Level Output Voltage, ds = 00 V
DD_DMC
= 1.70 V, I
OL
13.4 mA 0.312 V
V
OL_DDR2
3
Low Level Output Voltage, ds = 10 V
DD_DMC
= 1.70 V, I
OL
= 6.70 mA 0.390 V
V
OL_LPDDR
4
Low Level Output Voltage, ds = 00 V
DD_DMC
= 1.70 V, I
OL
= 11.2 mA 0.400 V
V
OL_LPDDR
5
Low Level Output Voltage, ds = 01 V
DD_DMC
= 1.70 V, I
OL
= 7.85 mA 0.400 V
V
OL_LPDDR
6
Low Level Output Voltage, ds = 10 V
DD_DMC
= 1.70 V, I
OL
= 5.10 mA 0.400 V
V
OL_LPDDR
7
Low Level Output Voltage, ds = 11 V
DD_DMC
= 1.70 V, I
OL
= 2.55 mA 0.400 V
I
IH
9
High Level Input Current V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 3.47 V
10 μA
I
IH_PD
10
High Level Input Current with Pull-
down Resistor
V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 3.47 V
110 μA
I
IL
11
Low Level Input Current V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 0 V
10 μA
I
IL_PU
12
Low Level Input Current with Pull-up
Resistor
V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 0 V
100 μA
I
IH_USB0
13
High Level Input Current V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 3.47 V
240 μA
I
IL_USB0
13
Low Level Input Current V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 0 V
100 μA
I
OZH
14
Three-State Leakage Current V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 3.47 V
10 μA
I
OZH
15
Three-State Leakage Current V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 1.9 V
10 μA
I
OZL
16
Three-State Leakage Current V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 0 V
10 μA
I
OZL_PU
17
Three-State Leakage Current with
Pull-up Resistor
V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 0 V
100 μA
I
OZH_TWI
18
Three-State Leakage Current V
DD_EXT
= 3.47 V, V
DD_DMC
= 1.9 V, V
DD_
USB
= 3.47 V, V
IN
= 5.5 V
10 μA
C
IN
19, 20
Input Capacitance T
AMBIENT
= 25°C 4.9 6.7 pF
C
IN_TWI
18,
20
Input Capacitance T
AMBIENT
= 25°C 8.9 9.9 pF
C
IN_DDR
20,
21
Input Capacitance T
AMBIENT
= 25°C 5.8 6.6 pF
I
DD_TD
V
DD_TD
Current V
DD_TD
= 3.3 V 1 μA
I
DD_DEEPSLEEP
22,
23
V
DD_INT
Current in Deep Sleep Mode f
CCLK
= 0 MHz
f
SCLK0/1
= 0 MHz
Table 21 on
Page 57
mA