Datasheet
Table Of Contents
- Blackfin Dual Core Embedded Processor
- Features
- Memory
- Table Of Contents
- Revision History
- General Description
- ADSP-BF60x Detailed Signal Descriptions
- 349-Ball CSP_BGA Signal Descriptions
- GP I/O Multiplexing for 349-Ball CSP_BGA
- ADSP-BF60x Designer Quick Reference
- Specifications
- Operating Conditions
- Electrical Characteristics
- Processor — Absolute Maximum Ratings
- ESD Sensitivity
- Processor — Package Information
- Timing Specifications
- Clock and Reset Timing
- Power-Up Reset Timing
- Asynchronous Read
- Asynchronous Flash Read
- Asynchronous Page Mode Read
- Synchronous Burst Flash Read
- Asynchronous Write
- Asynchronous Flash Write
- All Accesses
- Bus Request/Bus Grant
- DDR2 SDRAM Clock and Control Cycle Timing
- DDR2 SDRAM Read Cycle Timing
- DDR2 SDRAM Write Cycle Timing
- Mobile DDR SDRAM Clock and Control Cycle Timing
- Mobile DDR SDRAM Read Cycle Timing
- Mobile DDR SDRAM Write Cycle Timing
- Enhanced Parallel Peripheral Interface Timing
- Link Ports
- Serial Ports
- Serial Peripheral Interface (SPI) Port—Master Timing
- Serial Peripheral Interface (SPI) Port—Slave Timing
- Serial Peripheral Interface (SPI) Port—SPI_RDY Slave Timing
- Serial Peripheral Interface (SPI) Port—Open Drain Mode Timing
- Serial Peripheral Interface (SPI) Port—SPI_RDY Timing
- General-Purpose Port Timing
- Timer Cycle Timing
- Up/Down Counter/Rotary Encoder Timing
- Pulse Width Modulator (PWM) Timing
- ADC Controller Module (ACM) Timing
- Universal Asynchronous Receiver-Transmitter (UART) Ports—Receive and Transmit Timing
- CAN Interface
- Universal Serial Bus (USB) On-The-Go—Receive and Transmit Timing
- RSI Controller Timing
- 10/100 Ethernet MAC Controller Timing
- JTAG Test And Emulation Port Timing
- Output Drive Currents
- Environmental Conditions
- ADSP-BF60x 349-Ball CSP_BGA Ball Assignments
- Outline Dimensions
- Automotive Products
- Ordering Guide
Rev. 0 | Page 31 of 112 | June 2013
ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609
SYS_BMODE2 Boot Mode Control 2 Not Muxed SYS_BMODE2
SYS_CLKIN Clock/Crystal Input Not Muxed SYS_CLKIN
SYS_CLKOUT Processor Clock Output Not Muxed SYS_CLKOUT
SYS_EXTWAKE External Wake Control Not Muxed SYS_EXTWAKE
SYS_FAULT Fault Output Not Muxed SYS_FAULT
SYS_FAULT
Complementary Fault Output Not Muxed SYS_FAULT
SYS_HWRST Processor Hardware Reset Control Not Muxed SYS_HWRST
SYS_IDLE0 Core 0 Idle Indicator G PG_15
SYS_IDLE1
Core 1 Idle Indicator G PG_14
SYS_NMI
Non-maskable Interrupt Not Muxed SYS_NMI_RESOUT
SYS_PWRGD Power Good Indicator Not Muxed SYS_PWRGD
SYS_RESOUT
Reset Output Not Muxed SYS_NMI_RESOUT
SYS_SLEEP Processor Sleep Indicator G PG_15
SYS_TDA Thermal Diode Anode Not Muxed SYS_TDA
SYS_TDK Thermal Diode Cathode Not Muxed SYS_TDK
SYS_XTAL Crystal Output Not Muxed SYS_XTAL
TM0_ACI0 TIMER0 Alternate Capture Input 0 D PD_08
TM0_ACI1 TIMER0 Alternate Capture Input 1 G PG_14
TM0_ACI2 TIMER0 Alternate Capture Input 2 G PG_04
TM0_ACI3 TIMER0 Alternate Capture Input 3 D PD_07
TM0_ACI4 TIMER0 Alternate Capture Input 4 G PG_15
TM0_ACI5 TIMER0 Alternate Capture Input 5 D PD_06
TM0_ACI6 TIMER0 Alternate Capture Input 6 B PB_13
TM0_ACLK0 TIMER0 Alternate Clock 0 B PB_10
TM0_ACLK1 TIMER0 Alternate Clock 1 B PB_12
TM0_ACLK2 TIMER0 Alternate Clock 2 B PB_09
TM0_ACLK3 TIMER0 Alternate Clock 3 B PB_11
TM0_ACLK4 TIMER0 Alternate Clock 4 B PB_06
TM0_ACLK5 TIMER0 Alternate Clock 5 D PD_13
TM0_ACLK6 TIMER0 Alternate Clock 6 D PD_14
TM0_ACLK7 TIMER0 Alternate Clock 7 D PD_05
TM0_CLK TIMER0 Clock G PG_13
TM0_TMR0 TIMER0 Timer 0 E PE_14
TM0_TMR1 TIMER0 Timer 1 G PG_04
TM0_TMR2 TIMER0 Timer 2 G PG_01
TM0_TMR3 TIMER0 Timer 3 G PG_08
TM0_TMR4 TIMER0 Timer 4 G PG_09
TM0_TMR5 TIMER0 Timer 5 G PG_07
TM0_TMR6 TIMER0 Timer 6 G PG_11
TM0_TMR7 TIMER0 Timer 7 G PG_12
TWI0_SCL TWI0 Serial Clock Not Muxed TWI0_SCL
TWI0_SDA TWI0 Serial Data Not Muxed TWI0_SDA
TWI1_SCL TWI1 Serial Clock Not Muxed TWI1_SCL
TWI1_SDA TWI1 Serial Data Not Muxed TWI1_SDA
UART0_CTS
UART0 Clear to Send D PD_10
UART0_RTS
UART0 Request to Send D PD_09
Table 7. ADSP-BF60x 349-Ball CSP_BGA Signal Descriptions (Continued)
Signal Name Description Port Pin Name