Datasheet
Table Of Contents
- Blackfin Dual Core Embedded Processor
- Features
- Memory
- Table Of Contents
- Revision History
- General Description
- ADSP-BF60x Detailed Signal Descriptions
- 349-Ball CSP_BGA Signal Descriptions
- GP I/O Multiplexing for 349-Ball CSP_BGA
- ADSP-BF60x Designer Quick Reference
- Specifications
- Operating Conditions
- Electrical Characteristics
- Processor — Absolute Maximum Ratings
- ESD Sensitivity
- Processor — Package Information
- Timing Specifications
- Clock and Reset Timing
- Power-Up Reset Timing
- Asynchronous Read
- Asynchronous Flash Read
- Asynchronous Page Mode Read
- Synchronous Burst Flash Read
- Asynchronous Write
- Asynchronous Flash Write
- All Accesses
- Bus Request/Bus Grant
- DDR2 SDRAM Clock and Control Cycle Timing
- DDR2 SDRAM Read Cycle Timing
- DDR2 SDRAM Write Cycle Timing
- Mobile DDR SDRAM Clock and Control Cycle Timing
- Mobile DDR SDRAM Read Cycle Timing
- Mobile DDR SDRAM Write Cycle Timing
- Enhanced Parallel Peripheral Interface Timing
- Link Ports
- Serial Ports
- Serial Peripheral Interface (SPI) Port—Master Timing
- Serial Peripheral Interface (SPI) Port—Slave Timing
- Serial Peripheral Interface (SPI) Port—SPI_RDY Slave Timing
- Serial Peripheral Interface (SPI) Port—Open Drain Mode Timing
- Serial Peripheral Interface (SPI) Port—SPI_RDY Timing
- General-Purpose Port Timing
- Timer Cycle Timing
- Up/Down Counter/Rotary Encoder Timing
- Pulse Width Modulator (PWM) Timing
- ADC Controller Module (ACM) Timing
- Universal Asynchronous Receiver-Transmitter (UART) Ports—Receive and Transmit Timing
- CAN Interface
- Universal Serial Bus (USB) On-The-Go—Receive and Transmit Timing
- RSI Controller Timing
- 10/100 Ethernet MAC Controller Timing
- JTAG Test And Emulation Port Timing
- Output Drive Currents
- Environmental Conditions
- ADSP-BF60x 349-Ball CSP_BGA Ball Assignments
- Outline Dimensions
- Automotive Products
- Ordering Guide
Rev. 0 | Page 18 of 112 | June 2013
ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609
CrossCore Embedded Studio or VisualDSP++ installed (sold
separately), engineers can develop software for supported EZ-
KITs or any custom system utilizing supported Analog Devices
processors.
Software Add-Ins for CrossCore Embedded Studio
Analog Devices offers software add-ins which seamlessly inte-
grate with CrossCore Embedded Studio to extend its capabilities
and reduce development time. Add-ins include board support
packages for evaluation hardware, various middleware pack-
ages, and algorithmic modules. Documentation, help,
configuration dialogs, and coding examples present in these
add-ins are viewable through the CrossCore Embedded Studio
IDE once the add-in is installed.
Board Support Packages for Evaluation Hardware
Software support for the EZ-KIT Lite evaluation boards and EZ-
Extender daughter cards is provided by software add-ins called
Board Support Packages (BSPs). The BSPs contain the required
drivers, pertinent release notes, and select example code for the
given evaluation hardware. A download link for a specific BSP is
located on the web page for the associated EZ-KIT or EZ-
Extender product. The link is found in the Product Download
area of the product web page.
Middleware Packages
Analog Devices separately offers middleware add-ins such as
real time operating systems, file systems, USB stacks, and
TCP/IP stacks. For more information see the following web
pages:
• www.analog.com/ucos3
• www.analog.com/ucfs
• www.analog.com/ucusbd
• www.analog.com/lwip
Algorithmic Modules
To speed development, Analog Devices offers add-ins that per-
form popular audio and video processing algorithms. These are
available for use with both CrossCore Embedded Studio and
VisualDSP++. For more information visit www.analog.com and
search on “Blackfin software modules”.
Designing an Emulator-Compatible DSP Board (Target)
For embedded system test and debug, Analog Devices provides
a family of emulators. On each JTAG DSP, Analog Devices sup-
plies an IEEE 1149.1 JTAG Test Access Port (TAP). In-circuit
emulation is facilitated by use of this JTAG interface. The emu-
lator accesses the processor’s internal features via the
processor’s TAP, allowing the developer to load code, set break-
points, and view variables, memory, and registers. The
processor must be halted to send data and commands, but once
an operation is completed by the emulator, the DSP system is set
to run at full speed with no impact on system timing. The emu-
lators require the target board to include a header that supports
connection of the DSP’s JTAG port to the emulator.
For details on target board design issues including mechanical
layout, single processor connections, signal buffering, signal ter-
mination, and emulator pod logic, see the EE-68: Analog Devices
JTAG Emulation Technical Reference on the Analog Devices
website (www.analog.com)—use site search on “EE-68.” This
document is updated regularly to keep pace with improvements
to emulator support.
ADDITIONAL INFORMATION
The following publications that describe the ADSP-BF606/
ADSP-BF607/ADSP-BF608/ADSP-BF609 processors (and
related processors) can be ordered from any Analog Devices
sales office or accessed electronically on our website:
• Getting Started With Blackfin Processors
• ADSP-BF60x Blackfin Processor Hardware Reference
• Blackfin Processor Programming Reference
• ADSP-BF60x Blackfin Processor Anomaly List
RELATED SIGNAL CHAINS
A signal chain is a series of signal-conditioning electronic com-
ponents that receive input (data acquired from sampling either
real-time phenomena or from stored data) in tandem, with the
output of one portion of the chain supplying input to the next.
Signal chains are often used in signal processing applications to
gather and process data or to apply system controls based on
analysis of real-time phenomena. For more information about
this term and related topics, see the “signal chain” entry in the
Glossary of EE Terms on the Analog Devices website.
Analog Devices eases signal processing system development by
providing signal processing components that are designed to
work together well. A tool for viewing relationships between
specific applications and related components is available on the
www.analog.com website.
The Application Signal Chains page in the Circuits from the
Lab
TM
site (http:\\www.analog.com\circuits) provides:
• Graphical circuit block diagram presentation of signal
chains for a variety of circuit types and applications
• Drill down links for components in each chain to selection
guides and application information
• Reference designs applying best practice design techniques