Datasheet
Table Of Contents
- Blackfin Dual Core Embedded Processor
- Features
- Memory
- Table Of Contents
- Revision History
- General Description
- ADSP-BF60x Detailed Signal Descriptions
- 349-Ball CSP_BGA Signal Descriptions
- GP I/O Multiplexing for 349-Ball CSP_BGA
- ADSP-BF60x Designer Quick Reference
- Specifications
- Operating Conditions
- Electrical Characteristics
- Processor — Absolute Maximum Ratings
- ESD Sensitivity
- Processor — Package Information
- Timing Specifications
- Clock and Reset Timing
- Power-Up Reset Timing
- Asynchronous Read
- Asynchronous Flash Read
- Asynchronous Page Mode Read
- Synchronous Burst Flash Read
- Asynchronous Write
- Asynchronous Flash Write
- All Accesses
- Bus Request/Bus Grant
- DDR2 SDRAM Clock and Control Cycle Timing
- DDR2 SDRAM Read Cycle Timing
- DDR2 SDRAM Write Cycle Timing
- Mobile DDR SDRAM Clock and Control Cycle Timing
- Mobile DDR SDRAM Read Cycle Timing
- Mobile DDR SDRAM Write Cycle Timing
- Enhanced Parallel Peripheral Interface Timing
- Link Ports
- Serial Ports
- Serial Peripheral Interface (SPI) Port—Master Timing
- Serial Peripheral Interface (SPI) Port—Slave Timing
- Serial Peripheral Interface (SPI) Port—SPI_RDY Slave Timing
- Serial Peripheral Interface (SPI) Port—Open Drain Mode Timing
- Serial Peripheral Interface (SPI) Port—SPI_RDY Timing
- General-Purpose Port Timing
- Timer Cycle Timing
- Up/Down Counter/Rotary Encoder Timing
- Pulse Width Modulator (PWM) Timing
- ADC Controller Module (ACM) Timing
- Universal Asynchronous Receiver-Transmitter (UART) Ports—Receive and Transmit Timing
- CAN Interface
- Universal Serial Bus (USB) On-The-Go—Receive and Transmit Timing
- RSI Controller Timing
- 10/100 Ethernet MAC Controller Timing
- JTAG Test And Emulation Port Timing
- Output Drive Currents
- Environmental Conditions
- ADSP-BF60x 349-Ball CSP_BGA Ball Assignments
- Outline Dimensions
- Automotive Products
- Ordering Guide
Rev. 0 | Page 101 of 112 | June 2013
ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609
ENVIRONMENTAL CONDITIONS
To determine the junction temperature on the application
printed circuit board use:
where:
T
J
= Junction temperature (°C)
T
CASE
= Case temperature (°C) measured by customer at top
center of package.
JT
= From Table 68
P
D
= Power dissipation (see Total Internal Power Dissipation on
Page 56 for the method to calculate P
D
)
Values of
JA
are provided for package comparison and printed
circuit board design considerations.
JA
can be used for a first
order approximation of T
J
by the equation:
where:
T
A
= Ambient temperature (°C)
Values of
JC
are provided for package comparison and printed
circuit board design considerations when an external heat sink
is required.
In Table 68, airflow measurements comply with JEDEC stan-
dards JESD51-2 and JESD51-6. The junction-to-case
measurement complies with MIL-STD-883 (Method 1012.1).
All measurements use a 2S2P JEDEC test board.
Figure 62. Driver Type A Typical Rise and Fall Times (10%-90%) vs. Load
Capacitance (V
DD_EXT
= 3.3 V)
Figure 63. Driver Type B & C Typical Rise and Fall Times (10%-90%) vs. Load
Capacitance (V
DD_DMC
= 1.8 V)
LOAD CAPACITANCE (pF)
12
0
14
8
4
2
6
RISE AND FALL TIMES (ns)
10
0 25020050
100
150
16
t
RISE
t
FALL
t
FALL
= 3.3V @ 25
°
C
t
RISE
= 3.3V @ 25
°
C
LOAD CAPACITANCE (pF)
1.2
0
1.4
0.8
0.4
0.2
0.6
RISE AND FALL TIMES (ns)
1.0
0252051015
t
FALL
= 1.8V @ 25
°
C
t
RISE
= 1.8V @ 25
°
C
3530
t
RISE
DS = 10
t
FALL
DS = 10
t
RISE
DS = 00
t
FALL
DS = 00
Table 68. Thermal Characteristics
Parameter Condition Typical Unit
JA
0 linear m/s air flow 16.7 °C/W
JMA
1 linear m/s air flow 14.6 °C/W
JMA
2 linear m/s air flow 13.9 °C/W
JC
4.41 °C/W
JT
0 linear m/s air flow 0.11 °C/W
JT
1 linear m/s air flow 0.24 °C/W
JT
2 linear m/s air flow 0.25 °C/W
T
J
T
CASE
JT
P
D
+=
T
J
T
A
JA
P
D
+=