ADSP-BF592
Rev. B | Page 23 of 44 | July 2013
Table 19. Power-Up Reset Timing
Parameter Min Max Unit
Timing Requirements
t
RST_IN_PWR
RESET Deasserted after the V
DDINT
, V
DDEXT
, and CLKIN Pins are Stable and within
Specification
3500 × t
CKIN
s
Figure 8. Power-Up Reset Timing
RESET
t
RST_IN_PWR
CLKIN
V
DD_SUPPLIES
