Datasheet

ADSP-BF561
FRAME
SYNC IS
SAMPLED
DATA0 IS FOR DATA1 IS
SAMPLED DATA 0 SAMPLED
t
HDRPE
t
SDRPE
POLS = 0
POLS = 0
POLC = 0
POLS = 1
POLS = 1
POLC = 1
t
HFSPE
t
SFSPE
PPIx_DATA
PPIxCLK
PPIxCLK
PPIxSYNC1
PPIxSYNC2
Figure 15. PPI GP Rx Mode with External Frame Sync Timing (Default)
FRAME
SYNC IS
DRIVEN
DATA0 IS
OUT
DRIVEN
OUT
PPIxCLK
POLC = 0
PPIxCLK
POLC = 1
t
DFSPE
t
HOFSPE
POLS = 1
PPIxSYNC1
POLS = 0
POLS = 1
PPIxSYNC2
POLS = 0
t
DDTPE
t
HDTPE
PPIx_DATA
DATA0
Figure 16. PPI GP Tx Mode with Internal Frame Sync Timing (Default)
Rev. E | Page 29 of 64 | September 2009