Datasheet
ADSP-BF538/ADSP-BF538F
Rev. E | Page 33 of 60 | November 2013
SDRAM Interface Timing
Table 27. SDRAM Interface Timing
Parameter Min Max Unit
Timing Requirements
t
SSDAT
DATA Setup Before CLKOUT 2.1 ns
t
HSDAT
DATA Hold After CLKOUT 0.8 ns
Switching Characteristics
t
SCLK
CLKOUT Period 7.5 ns
t
SCLKH
CLKOUT Width High 2.5 ns
t
SCLKL
CLKOUT Width Low 2.5 ns
t
DCAD
Command, ADDR, Data Delay After CLKOUT
1
1
Command pins include: SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
6.0 ns
t
HCAD
Command, ADDR, Data Hold After CLKOUT
1
0.8 ns
t
DSDAT
Data Disable After CLKOUT 6.0 ns
t
ENSDAT
Data Enable After CLKOUT 1.0 ns
Figure 16. SDRAM Interface Timing
t
SCLK
CLKOUT
t
SCLKL
t
SCLKH
t
SSDAT
t
HSDAT
t
ENSDAT
t
DCAD
t
DSDAT
t
HCAD
t
DCAD
t
HCAD
DATA (IN)
DATA (OUT)
COMMAND,
ADDRESS
(OUT)
NOTE: COMMAND = SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.