Datasheet

Rev. I|Page 36 of 68 | July 2010
ADSP-BF534/ADSP-BF536/ADSP-BF537
External DMA Request Timing
Table 28 and Figure 15 describe the external DMA request
operations.
Table 28. External DMA Request Timing
Parameter MinMaxUnit
Timing Requirements
t
DR
DMARx Asserted to CLKOUT High Setup 6.0 ns
t
DH
CLKOUT High to DMARx Deasserted Hold Time 0.0 ns
t
DMARACT
DMARx Active Pulse Width 1.0 × t
SCLK
ns
t
DMARINACT
DMARx Inac tive Pulse Width 1.75 × t
SCLK
ns
Figure 15. External DMA Request Timing
CLKOUT
t
DR
DMAR0/1
(ACTIVE LOW)
t
DH
DMAR0/1
(ACTIVE HIGH)
t
DMARACT
t
DMARINACT
t
DMARINACT
t
DMARACT