Datasheet

ADSP-BF534/ADSP-BF536/ADSP-BF537
Rev. I|Page 35 of 68 | July 2010
SDRAM Interface Timing
Table 27. SDRAM Interface Timing
Parameter MinMaxUnit
Timing Requirements
t
SSDAT
DATA15–0 Setup Before CLKOUT 1.5 ns
t
HSDAT
DATA15–0 Hold After CLKOUT 0.8 ns
Switching Characteristics
t
DCAD
COMMAND
1
, ADDR19–1, DA TA15–0 Delay After CLKOUT
1
Command pins include: SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
4.0 ns
t
HCAD
COMMAND
1
, ADDR19–1, DA TA15–0 Hold After CLKOUT 1.0 ns
t
DSDAT
DATA15–0 Disable After CLKOUT 6.0 ns
t
ENSDAT
DATA15–0 Enable After CLKOUT 0.5 ns
t
SCLK
2
2
These limits are specific to the SDRAM interface only. In addition, CLKOUT must always comply with the limits in Table 14 on Page 25.
CLKOUT Period when T
J
≤ +105°C 7.5 ns
t
SCLK
2
CLKOUT Period when T
J
> +105°C 10 ns
t
SCLKH
CLKOUT Width High 2.5 ns
t
SCLKL
CLKOUT Width Low 2.5 ns
Figure 14. SDRAM Interface Timing
t
SCLK
CLKOUT
t
SCLKL
t
SCLKH
t
SSDAT
t
HSDAT
t
ENSDAT
t
DCAD
t
DSDAT
t
HCAD
t
DCAD
t
HCAD
DATA (IN)
DATA (OUT)
COMMAND,
ADDRESS
(OUT)
NOTE: COMMAND = SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.