Datasheet

Rev. I|Page 34 of 68 | July 2010
ADSP-BF534/ADSP-BF536/ADSP-BF537
External Port Bus Request and Grant Cycle Timing
Table 26 and Figure 13 describe external port bus request and
bus grant operations.
Table 26. External Port Bus Request and Grant Cycle Timing
Parameter
1, 2
MinMaxUnit
Timing Requirements
t
BS
BR Asserted to CLKOUT Low Setup 4.6 ns
t
BH
CLKOUT Low to BR Deasserted Hold Time 0.0 ns
Switching Characteristics
t
SD
CLKOUT Low to AMSx, Address, and ARE/AWE Disable 4.5 ns
t
SE
CLKOUT Low to AMSx, Address, and ARE/AWE Enable 4.5 ns
t
DBG
CLKOUT High to BG Asserted Setup 3.6 ns
t
EBG
CLKOUT High to BG Deasserted Ho ld Time 3.6 ns
t
DBH
CLKOUT High to BGH Asserted Setup 3.6 ns
t
EBH
CLKOUT High to BGH Deasser ted Hold Time 3.6 ns
1
These timing parameters are based on worst-case operating conditions.
2
The pad loads for these timing parameters are 20 pF.
Figure 13. External Port Bus Request and Grant Cycle Timing
AMSx
CLKOUT
BG
BGH
BR
ADDR 19-1
ABE1-0
t
BH
t
BS
t
SD
t
SE
t
SD
t
SD
t
SE
t
SE
t
EBG
t
DBG
t
EBH
t
DBH
AWE
ARE